industry news
Subscribe Now

Accellera Systems Initiative Announces SCE-MI 2.3

Elk Grove, Calif., August 20, 2015 – Accellera Systems Initiative (Accellera), the electronics industry organization focused on electronic design automation (EDA) and intellectual property (IP) standards, announced today updates to the Standard Co-Emulation Modeling Interface (SCE-MI).

The newest version of the standard, SCE-MI 2.3, expands the set of SCE-MI compliant DPI function argument data types, giving users less restrictions and more opportunity for design portability; extends the debug interface to provide C-side access to HDL-side registers, making the design on the emulator more accessible and debug easier; and adds a new mechanism that enables a SystemVerilog HVL-side testbench to call DPI functions to HDL-side SystemVerilog and vice versa, removing limitations in emulation usage. 

“The goal of the SCE-MI standard is to reduce the effort necessary to get a system into an emulation or prototyping environment for verification,” stated Brian Bailey, Interface Working Group chair.  “With the new updates, we are removing restrictions, improving emulation debug capabilities and providing an enhancement to overcome unintended language limitations, giving users more flexibility in their verification flows.”

The Interfaces Working Group is seeking input on SCE-MI 2.3 from the community for consideration in the next revision of the standard.  To provide feedback on SCE-MI 2.3, please send email to sce-mi-feedback@lists.accellera.org.  To download SCE-MI 2.3 for free, visit the Accellera Downloads page.

About Accellera Systems Initiative

Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more aboutmembership.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Exploring the Potential of 5G in Both Public and Private Networks – Advantech and Mouser
Sponsored by Mouser Electronics and Advantech
In this episode of Chalk Talk, Amelia Dalton and Andrew Chen from Advantech investigate how we can revolutionize connectivity with 5G in public and private networks. They explore the role that 5G plays in autonomous vehicles, smart traffic systems, and public safety infrastructure and the solutions that Advantech offers in this arena.
Apr 1, 2024
3,394 views