fish fry
Subscribe Now

A Bear, a Transistor and a Process Node Walk Into a Bar

In this week’s Fish Fry, I interview James Wang (SmartBear Software – Vice President) about the age old gap between hardware and software designers and how SmartBear’s tool suite can help bridge that divide.  

Also this week, I check in on Samsung’s progress on 20nm process node and investigate how the National Science Foundation is trying to make the transistor obsolete.  

I have a DE0-Nano Development Board to give out this week, but you’ll have to listen to find out how you can win.


 

Watch Previous Fish Frys

Fish Fry Links – September 23, 2011

Fresh Byte – Space Junk Falling From the sky

National Science Foundation Awards $20 Million In Grants to Nanoelectronics

More Information about the 2011 International Electron Devices Meeting

DAC Panel hosted by Cadence “Getting a Jumpstart on 20nm”

More Information about Samsung’s 20nm process node

More information about SmartBear Software

DE0-Nano Development Board

Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

John Bruggeman, Former CMO – Cadence Design Systems

Darrin Billerbeck, CEO – Lattice Semiconductor

Lauro Rizzatti, Vice President of Marketing, EVE

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Kapil Shankar, CEO – SiliconBlue

Andy Pease, CEO – QuickLogic

Rajeev Madhavan, CEO – Magma 


Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Using the Vishay IHLE® to Mitigate Radiated EMI
Sponsored by Mouser Electronics and Vishay
EMI mitigation is an important design concern for a lot of different electronic systems designs. In this episode of Chalk Talk, Amelia Dalton and Tim Shafer from Vishay explore how Vishay’s IHLE power inductors can reduce radiated EMI. They also examine how the composition of these inductors can support the mitigation of EMI and how you can get started using Vishay’s IHLE® High Current Inductors in your next design.
Dec 4, 2023
19,391 views