IRVINE, Calif., January 27, 2025 – DesignCon 2025 – TeraSignal, a leader in intelligent interconnect technology, will showcase its new PCIe 6.0 Intelligent Re-Driver solutions at DesignCon 2025. Designed to meet the rigorous connectivity demands of AI accelerators, GPUs, and CPUs, these innovative solutions deliver low-power, low-latency performance critical for next-generation AI and compute infrastructure.
The TS5602 Intelligent Re-Driver, supports 4x64Gb/s PCIe connectivity and is available in a compact 7.25mm x 5.25mm FCLGA package as well as a flip chip bumped die. Key features include:
- Over 50% power reduction compared to DSP-based retimers.
- Low latency through DSP-free architecture.
- Digital eye monitoring for real-time BER visibility on every link.
- Automatic link training powered by TSLink software for streamlined setup.
- Automatic receiver detection for PCIe use cases.
These Intelligent Re-Drivers are versatile for deployment across server boards, riser cards, active copper cables (PCIe ACC), and active optical cables (PCIe AOC), making them ideal for emerging multi-rack server architectures.
Live Demonstration at DesignCon 2025
Visit TeraSignal in their private conference room adjacent to the Santa Clara Convention Center at: 5201 Great America Pkwy. Suite 320, Santa Clara, California 95054 to see the TS5602 in action. For more information, visit www.terasignal.com.
About TeraSignal
TeraSignal is a leader in high-speed data transmission, specializing in intelligent interconnect solutions for AI-centric data centers, and next generation computing hardware, and Linear Optics. Our technologies and products focus on improving power efficiency, reducing latency, and lowering bit-error-rate, while providing advanced link diagnostics in optical interconnects. Through innovations in CMOS design and adaptive link training, TeraSignal is redefining intelligent optical connectivity across various components in AI infrastructure. Learn more at terasignal.com.
