MILPITAS, SUNNYVALE and SAN JOSE, Calif. – September 21, 2010: Open-Silicon, Inc., MIPS Technologies, Inc. (NASDAQ: MIPS), and Dolphin Technology today announced the successful tapeout of a high-performance ASIC processor at over 2.4GHz under typical conditions.  This achievement, as measured in timing closure against TSMC reference flow signoff conditions, will make this one of the highest frequency ASIC processors ever built, highlighting the companies’ industry-leading technologies for building high-performance processor-based systems.  This high-performance ASIC processor is a follow-on test chip to the 65nm, 1.1GHz test chip announced by Open-Silicon and MIPS Technologies at the end of last … Read More → "Open-Silicon, MIPS Technologies, and Dolphin Technology Achieve ASIC CPU Performance of Over 2.4GHz in TSMC 40nm"

Embedded Systems Conference, Boston, MA. September 20, 2010. LDRA, the leading provider of automated software verification tools, has released a newly revamped TBmanager, V8.4. TBmanager serves as a task-based interface to the LDRA tool suite, creating a common user experience among the LDRA modules. In addition to improving overall ease of use, TBmanager V8.4 accommodates regression suites, test scripts and testing of applications developed using multiple … Read More → "LDRA Interface Maximizes Efficiency and Ease-of-Use"

MOUNTAIN VIEW, Calif., Sept. 20 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today unveiled new HSPICE® Precision Parallel (HPP) multi-threading technology that delivers up to 7X simulation speed-up for complex analog and mixed-signal designs. In addition to the new HPP technology, the HSPICE 2010 solution includes enhanced convergence algorithms, advanced analog analysis features and foundry-qualified support for process design kits (PDKs) that extend HSPICE gold-standard accuracy to the verification of complex circuits such as phase-locked loops, SERDES, data converters, … Read More → "New Synopsys HSPICE Precision Parallel Technology Delivers Up to 7X Speed-up for Analog/Mixed-Signal Designs"

Embedded Systems Conference, Boston, MA – September 20 2010. LDRA (Booth 414), the leading provider of automated software verification, source code analysis and test tools, has integrated the LDRA tool suite with a variety of compiler and RTOS technologies for the PowerPC (PPC) family. Targeting safety-critical systems, LDRA has extended its PPC support across the primary tool chains of Wind River Tornado, Wind River Workbench … Read More → "LDRA Tool Suite High- and Object-Level Support Extended for Full Range of PowerPCs"

CONCORD, CA, SEPTEMBER 16, 2010 – D-Tools, Inc., the worldwide leader in system integration software, today announced that system integration consulting firm Firefly Design Group has joined the D-Tools Certified Partner Program to provide services around D-Tools award-winning System Integrator software. Firefly Design Group provides marketing, system design, project documentation, data and package creation, and best practices for D-Tools SI users.

“We’re tremendously pleased to become a D-Tools Certified Partner and to be able to help custom integrators improve their business through the use of the D-Tools software platform,” said Ron Callis, Founder … Read More → "Firefly Design Group Teams Up with D-Tools to Provide Data and Consulting Services for System Integrator™ Software Users"

SANTA CLARA, Calif., September 15, 2010 –

Who: MoSys (NASDAQ: MOSY), a leading provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is exhibiting at GSA’s Emerging Opportunities Expo and Conference on September 16, 2010. MoSys will be located in booth 503.

… Read More → "MoSys Exhibits at GSA Emerging Opportunities Expo and Conference"

MONROVIA, California – September 14, 2010 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), has joined the IPL Alliance, an industry organization established to develop an interoperable eco-system for custom design by creating and promoting interoperable process design kit (iPDK) standards. Tanner EDA provides analog and mixed-signal (A/MS) designers with the Read More → "Tanner EDA Joins IPL Alliance to Widen Adoption of Interoperable Process Design Kits for Analog/ Mixed-signal Designs"

Eindhoven, The Netherlands,  September 14, 2010. Huntron, Inc., a leader in PCB diagnosis and troubleshooting equipment for over 30 years, and JTAG Technologies, a tier one supplier of boundary-scan products world-wide, today announced the integration of their test methods within Huntron’s range of prober enhanced analog signature analysis products.

‘Huntron Tracker’ is synonymous with PCB fault detection using the technique known as analog signature analysis. From today users of this technology can now take advantage of advancements made in the digital world that allow PCBs to be tested using built-in logic … Read More → "Boundary-scan Boost for Huntron Robotic Probers"

MOUNTAIN VIEW, Calif., Sept. 14 /PRNewswire/ — Synopsys, Inc. (NASDAQ: SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that eMemory Technology, Inc. has selected Synopsys’ CustomSim(TM) solution for all of its circuit simulation needs. On a 45-nanometer (nm) embedded non-volatile memory, the CustomSim solution demonstrated up to 2 times faster simulation runtime compared to other commercial FastSPICE tools, and delivered results tightly correlated to silicon data. Based on these results, CustomSim is now used in verification … Read More → "eMemory Standardizes on Synopsys FastSPICE for Circuit Simulation"

SAN FRANCISCO, Sept. 10 /PRNewswire/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, will be demonstrating its complete DesignWare® IP solutions for PCI Express® 3.0, USB 3.0 and SATA 6 Gb/s, consisting of device, host, PHY and verification IP, at the Intel Developer Forum (IDF) in San Francisco, California from September 13-15.

IDF is the premier global technology industry event bringing together technology professionals who are actively directing where technology is going. … Read More → "Synopsys Showcases DesignWare IP Solutions for PCI Express, USB and SATA at Intel Developer Forum 2010"