MOUNTAIN VIEW, Calif. and SHANGHAI, Nov. 15, 2010 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and Semiconductor Manufacturing International Corporation (“SMIC”; NYSE: SMI; SEHK: 981), today announced that they have delivered a comprehensive solution for system-on-chip (SoC) design for SMIC’s advanced 65-nanometer (nm) process. The solution integrates Synopsys’ broad DesignWare™ interface and analog IP portfolio plus other foundation IP with Synopsys’ Galaxy™ Implementation Platform, in a tuned reference flow. The companies have also begun work on their 40-nm design solution. Based on collaboration agreements for 65-nm and 40-nm, … Read More → "Synopsys and SMIC Team to Deliver Proven SoC Design Solution for 65-nm to 40-nm Process Nodes"

WHAT: Jasper Design Automation CEO Kathryn Kranen is an invited speaker at this year’s IP-SOC 2010, describing best practices for post-silicon validation, debug and verification, and offering timely solutions for this increasingly urgent issue.  Held annually in Grenoble, IP-SOC highlights IP-based SoC design issues with three days of seminars, panels and distinguished speakers.  2010 conference dates are Nov. 30 – Dec. 1.  For more information: http://www.design-reuse.com/ipsoc2010/.

WHEN:  Wednesday, Dec. 1, 10:30am-11:00 … Read More → "Jasper CEO Kathryn Kranen Addresses Post-Silicon Validation Challenge at IP-SOC 2010, Dec. 1, Grenoble"

MOUNTAIN VIEW, Calif., Nov. 11, 2010 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today reported that Cavium Networks, Inc. used NanoTime transistor-level static timing analysis (STA) solution to achieve full-chip STA signoff for its next-generation internet application processor, OCTEON II that is shipping now. The multi-core, high speed OCTEON II processor is optimized for high performance network packet processing and low power consumption. Targeted for scalable networking equipment designed to fuel the voice, video and data convergence driven by cloud computing, the OCTEON II required extremely accurate timing verification in … Read More → "Synopsys NanoTime Enables Full Chip Transistor Level Timing Analysis on Cavium Networks OCTEON II Internet Application Processor"

November 10, 2010, Woodcliff Lake, NJ — The USB Implementers Forum (USB-IF) has recently granted certification to the SuperSpeed USB 3.0 Device Controller IP Core from intellectual property provider CAST, Inc.

Certification by this standards body ensures the core satisfies the USB 3.0 specification and delivers the benefits of SuperSpeed USB: data transfer rates up to 5 Gbps, Sync-and-go technology to reduce wait times, reduced power consumption, and backwards compatibility with Hi-Speed USB 2.0.

While many … Read More → "SuperSpeed USB 3.0 IP Core from CAST, Inc. Achieves USB-IF Certification"

Munich, Germany, November 2nd,  2010 Digitaltest GmbH, one of the leaders in electronics testing and production solutions, and JTAG Technologies, tier one provider of boundary-scan products world-wide, today announced the integration of their test methods within the Digitaltest MTS series of in-circuit test systems. As a result, electronics designers and manufacturers will benefit from even greater test coverage and programmability of complex PCBs, all within a single process step.

Digitaltest’s Sigma ‘combinational’ test system is already among the most versatile and advanced board testers on the market with comprehensive& … Read More → "Digitaltest and JTAG Technologies Combine to Provide Comprehensive PCB Test Capability"

November 9th 2010 – Uppsala, Sweden. IAR Systems today announced IAR Embedded Workbench for ARM 6.10, the latest version of its comprehensive tool chain for embedded developers. Supporting a wide range of ARM targets, this version of Embedded Workbench is the first to incorporate full ISO / ANSI specification support of C++.

Developers using IAR Embedded Workbench can now benefit from the full feature set of the C++ language, including useful but resource consuming features like STL, RTTI and exceptions. When running on high-end embedded processors these features can help increase productivity and make applications more robust.

C++ is … Read More → "IAR Systems adds full C++ support to embedded development tools"

SANTA CLARA, Calif., Nov. 3, 2010 — Agilent Technologies Inc. (NYSE: A) today announced a free computer-based resource center to help engineers quickly find relevant documentation and other information on Agilent oscilloscope probes.

Hardcopy manuals often are misplaced or discarded, making it difficult for engineers to find documentation when they need it. The Agilent Probe Resource Center solves this problem. The software application contains manuals, application notes, data sheets, selection guides,demo videos, industry-standard SPICE (Simulation Program with Integrated Circuit Emphasis)models, and more … Read More → "Agilent Technologies Introduces Computer-Based Resource Center for Oscilloscope Probes"

COLUMBIA, Md., Nov. 9, 2010 /PRNewswire/ — Eurotech, a leading supplier of embedded technologies, products, and systems, announces today the launch of several COM Express modules to extend the product line of standards-based embedded computers.  Based on the Freescale Semiconductor QorIQ SoC processor platform using the Power Architecture technology, Eurotech launches three new COM Express modules: the Adbc7517, Adbc7519, and Adbc7520. The three new products take advantage of the QorIQ platform for … Read More → "Eurotech Extends COM Express Product Line With New Modules Based on Freescale QorIQ Processors"