MOUNTAIN VIEW, Calif., March 28, 2012 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that its collaboration with the members of the Interconnect Modeling Technical Advisory Board (IMTAB) of the IEEE Industry Standards and Technology Organization (IEEE-ISTO) has resulted in a parasitic variation modeling solution to address the effects of double patterning technology (DPT), targeted for use in 20-nanometer (nm) IC manufacturing. The new DPT model extensions will be available to the EDA and semiconductor industries through the open source licensed Interconnect Technology … Read More → "Synopsys’ Collaboration with Industry Consortium Yields Double Patterning Technology Models for Parasitic Extraction"

MOUNTAIN VIEW, Calif., March 28, 2012 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that its StarRC™ parasitic extraction solution has enabled more than 150 successful 28-nanometer (nm) tapeouts, delivering fast turnaround time and the signoff accuracy required for next-generation designs across computer, consumer, mobile and wireless communications applications. StarRC’s advanced modeling of complex process effects at the 28-nm silicon process technology node and its leading qualification by major foundries provides lower design risk and improved opportunity for one-pass tapeout success. StarRC … Read More → "Synopsys’ StarRC Extraction Solution Enables More Than 150 Successful 28nm Tapeouts"