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Plessey launches an ultra-low cost version of its award winning EPIC sensor for high volume consumer applications at Chicago Sensor Expo 2012

May 30, 2012

Plymouth, ENGLAND – 30 May 2012 – Plessey Semiconductors announced today the release of the PS25451, an ultra-low cost version of its award winning EPIC™ sensor that provides remote sensing for high volume consumer markets. A novel electrode design has been devised to replace the expensive titanium dioxide electrodes currently used for the higher end, medical applications of EPIC technology.  

The PS25451 is an ultra-high impedance, non-contact, solid state electric potential sensor that can be used for a variety of consumer electronic devices such as proximity switching of lighting, gesture-based remote control of interactive toys, computer games, TVs, monitors, other appliances … Read More → "Plessey launches an ultra-low cost version of its award winning EPIC sensor for high volume consumer applications at Chicago Sensor Expo 2012"

GLOBALFOUNDRIES Selects Synopsys’ Yield Explorer for Faster Yield Ramp

May 30, 2012

MOUNTAIN VIEW, Calif., May 30, 2012 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that GLOBALFOUNDRIES has selected Synopsys’ Yield Explorer® solution as part of their next-phase Yield Management System (YMS) for faster yield ramp based on volume diagnostics.  Rapid identification and correction of systematic failure mechanisms is critical to bringing a new technology node to production and driving the yield ramp on new integrated circuit (IC) … Read More → "GLOBALFOUNDRIES Selects Synopsys’ Yield Explorer for Faster Yield Ramp"

Real Intent Leads in Speed, Capacity and Precision with New Releases of Ascent Lint and Meridian CDC Verification Tools; Demos Set for 49th DAC

May 30, 2012

SUNNYVALE, Calif. – May 29, 2012 – Real Intent, Inc., the leading provider of software products that accelerate Early Functional Verification and Advanced Sign-off of electronic designs, announced today the release of version 4.1 of its Meridian™ Clock Domain Crossing (CDC) analyzer and the release of version 1.5.1 of its Ascent™ Lint tool. These new releases provide significant advances over the 2011 versions of the software.

Real Intent’s software products solve challenging … Read More → "Real Intent Leads in Speed, Capacity and Precision with New Releases of Ascent Lint and Meridian CDC Verification Tools; Demos Set for 49th DAC"

Global Technology Executives Collaborate to Deliver Faster, Smarter and Less Expensive Integrated Circuits to Consumers

May 29, 2012

SARATOGA SPRINGS, NY—MAY 25, 2012—The Semiconductor Industry Association (SIA), representing U.S. leadership in semiconductor manufacturing and design, today announced that the worldwide semiconductor industry has reached agreement and consensus on a variety of international trade issues during the 16th annual meeting of the World Semiconductor Council (WSC). The WSC is a worldwide body of semiconductor industry leaders and executives from China, Chinese Taipei, Europe, Japan, Korea and the United States that meets annually to work together to address issues of global concern to the semiconductor industry.

“The WSC meeting process is vital to … Read More → "Global Technology Executives Collaborate to Deliver Faster, Smarter and Less Expensive Integrated Circuits to Consumers"

DFI Group Releases Version 3.1 of Its High-Speed Memory Controller and PHY Interface Specification

May 29, 2012

SAN JOSE, CA–(Marketwire – May 29, 2012) – The DDR PHY Interface (DFI) Group today released the DFI 3.1 specification, the latest version of the pervasive industry specification that defines an interface protocol between DDR memory controllers and PHYs. The specification enables the development of systems-on-chip (SoCs) that support the DDR3 and DDR4 memory standards. Version 3.1 adds support for the LPDDR3 mobile memory standard for smartphones and tablets, as well as enhancements to the low-power interface and training features. The … Read More → "DFI Group Releases Version 3.1 of Its High-Speed Memory Controller and PHY Interface Specification"

Xtendwave selects EnSilica’s eSi-3200 processor for the receiver IC implementing NIST’s next-generation WWVB atomic timekeeping signal

May 29, 2012

Wokingham, UK – 29th May 2012.  EnSilica, a leading independent provider of IC design services and system solutions, has announced that Xtendwave has licensed its high-performance eSi-3200 32-bit processor core to power Everset™, Xtendwave’s time code receiver solution for the next-generation WWVB atomic timekeeping signal. The new signal, broadcast by NIST (the National Institute of Standards and Technology), a US Government agency, will represent the official time of the USA and includes the implementation of daylight saving time and leap seconds. 

Xtendwave, a fabless semiconductor company focused on the development of physical-layer communication technologies is developing … Read More → "Xtendwave selects EnSilica’s eSi-3200 processor for the receiver IC implementing NIST’s next-generation WWVB atomic timekeeping signal"

Renesas Electronics Europe releases free VDE certified self-test MCU routines for IEC60730/60335 safety compliance

May 29, 2012

Dusseldorf, May 29, 2012 – Renesas Electronics Europe today announced that it has received VDE certification for its IEC60335-compliant self-test software for the RX200 family of microcontrollers. The latest self-test CPU software routines developed for the RX200 family are fully compliant with IEC60730-1 regulations and have now been certified by VDE (the German Association for Electrical, Electronic & Information Technologies). VDE is widely recognized for its work on safety standards and approvals. 

In addition to the on-chip hardware safety features, the self-test CPU software makes … Read More → "Renesas Electronics Europe releases free VDE certified self-test MCU routines for IEC60730/60335 safety compliance"

Flexras Technologies Announces Breakthrough Automatic Partitioning Tool that Boosts FPGA-Based Prototyping Performance by 10X

May 29, 2012

SAN FRANCISCO, CA– Design Automation Conference (DAC) – May 29, 2012 – Flexras Technologies, an EDA company specializing in partitioning for FPGA-based prototyping, today announced Wasga Compiler, a software tool that boosts multi-FPGA design performance. Wasga Compiler is unique and is the first timing-driven, multi-FPGA partitioning software for ASIC and SoC prototyping. It typically delivers a 10X clock frequency increase, runs blazingly fast, handles multi-billion ASIC gates equivalents designs, and maps them to any Altera or Xilinx board, whether it’s off-the-shelf or custom.

Read More → "Flexras Technologies Announces Breakthrough Automatic Partitioning Tool that Boosts FPGA-Based Prototyping Performance by 10X"

Cadence Announces Updated Design and Verification IP for DDR PHY Interface

May 29, 2012

SAN JOSE, CA–(Marketwire – May 29, 2012) – “As the performance of the processors used in today’s consumer electronics devices improves, so does their need for higher-bandwidth memory. The DFI interface standard was developed to give SoC designers a way to easily incorporate high-performance memory into their SoCs,” said Marc Greenberg, director of marketing, SoC Realization, Cadence. “Through our close working relationship with the DFI Group, we are able to offer our customers design and verification IP that supports the latest version of this popular interface standard.”Cadence Design Systems, Inc. (NASDAQ: Read More → "Cadence Announces Updated Design and Verification IP for DDR PHY Interface"

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