Cadence Digital and Custom/Analog Tools Achieve TSMC Certification for 10nm FinFET Early Design Starts
SAN JOSE, Calif., April 6, 2015?Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its digital and custom/analog tools have achieved certification from TSMC (TWSE: 2330, NYSE: TSM) for its most current version of 10-nanometer (nm) FinFET Design Rule Manual (DRM) and SPICE models.
The Cadence® custom/analog and digital implementation and signoff tools have been certified by TSMC on high-performance reference designs in order to provide customers with the fastest path to design closure on the 10nm FinFET process and include:
? Encounter® Digital Implementation System and Innovus? Implementation System: The Encounter Digital Implementation System has … Read More → "Cadence Digital and Custom/Analog Tools Achieve TSMC Certification for 10nm FinFET Early Design Starts"

