San Jose, Calif., February 2, 2011—Altera Corporation (NASDAQ: ALTR) today announced that its variable-precision digital signal processing (DSP) block architecture won the DesignCon 2011 DesignVision Award in the Semiconductor and IC category. Altera’s variable-precision DSP block architecture was recognized by DesignVision Award judges for its ability to enable high-precision, high-performance digital signal processing in FPGAs that efficiently … Read More → "Altera’s 28-nm Variable-Precision DSP Block Architecture Wins the 2011 DesignVision Award"
Mountain View, CA — Feb. 8, 2011 — Analog Bits, the Integrated Clocking and Interface IP leader, today announced the commercial availability of the industry’s lowest power 40nm, high-speed Serializer/Deserializer IP. The break through macro is programmable to support multiple protocols and small enough to be used in embedded SOC’s.
The Analog Bits 40nm SerDes supports more than 100 lanes, from 1 to 12.5 Gb per lane on single IC with a mere 5mw per gigabit per second per lane power consumption. It is currently in production in multiple applications and is validated in over 30 industry … Read More → "Analog Bits Unveils Industry’s Lowest Power 40nm High Bandwidth SerDes"
Altera Delivers Industry’s First Interface Targeting MoSys’s Serial, High-Density Bandwidth Engine Device
San Jose, Calif., February 8, 2011—Altera Corporation (Nasdaq: ALTR) today announced it successfully completed interoperability testing between its Stratix® IV GT FPGA and the Bandwidth Engine® device from MoSys in a serial memory application. Stratix IV GT FPGAs leverage the GigaChip™ Interface to interoperate with MoSys’s Bandwidth Engine device, providing designers of 100G wireline applications, such as traffic management and packet processing, a high-performance, high-bandwidth memory solution. With its Stratix IV GT FPGA, Altera is the first FPGA vendor to deliver device support for the GigaChip Interface.
Woburn, USA – February 4, 2011. Strategic Test is introducing the TX53 Computer on Module – a further addition to its CoM family based on Freescale’s multimedia processors. The brand new module integrates the high-performance and energy-efficient ARM Cortex™ A8-based Freescale multimedia processor i.MX53 with 1 GHz clock speed and enhances Strategic’s module family as its most powerful addition. Thanks to the i.MX53’s support of multi-standard-video with up to 1080p, the module is ideal for deployment in embedded applications with high performance demands … Read More → "Strategic Test announces World’s first Freescale i.MX53 processor DIMM module"
MILPITAS, CA – February 8, 2011 – Linear Technology Corporation announces the LT3083, a 3A LDO that can be paralleled for heat spreading and higher output current, and is adjustable with a single resistor. This regulator is based on the same innovative architecture as its 1.1A predecessor, the LT3080, which uses a current source reference for single resistor output … Read More → "Surface Mount 3A LDO is Easily Paralleled for High IOUT without Any Hot Spots"
February 8, 2011, Montreal, Canada — Matrox Imaging is pleased to announce that the Matrox Supersight e2 high-performance computing (HPC) platform is now equipped with ATI FirePro™ Professional Graphics from AMD (NYSE: AMD).
Matrox Supersight e2, with its unique high-bandwidth PCIe® 2.0 switched fabric backplane, provides substantial data throughput and expansion capability for supporting up to six double-wide or up to nine single-wide GPUs in a 4U platform. In turn, each ATI FirePro Professional Graphics card provides up to 1600 stream … Read More → "Matrox Supersight e2 HPC platform now integrates ATI FireProT Professional Graphics"
WILSONVILLE, Ore., February 7, 2011—Mentor Graphics Corporation (NASDAQ: MENT) today announced that VIA Technologies, Inc., a fabless supplier of power efficient x86 processor platforms, is adopting the Calibre® PERC electrical rule checking product to ensure that electrostatic discharge (ESD) protection meets established guidelines to help prevent circuit failures and design re-spins.
By helping ensure that designers have met all ESD protection rules, the Calibre PERC product contributes to the robustness of designs in portable and high-reliability applications. It also verifies the integrity of low-power designs that have multiple-power domains by making a variety of leakage and … Read More → "VIA Technologies Adopts Mentor Graphics Calibre PERC for Critical ESD Checkin"
Xilinx to Demonstrate its Targeted Design Platforms for Radio and Baseband Processing at Mobile World Congress 2011
BARCELONA, SPAIN, FEB. 7, 2011 – Xilinx, Inc. (Nasdaq: XLNX) today announced its participation at Mobile World Congress 2011 in Barcelona, Spain, from Feb. 14 – 17, 2011, Hall 1, Stand E47. Xilinx will showcase its Targeted Design Platforms targeting cellular infrastructures by using FPGAs that enable global wireless communications with lower cost and power solutions for radio, baseband, and connectivity. The market specific platforms integrate the latest hardware, software, and IP innovations to help network infrastructure vendors and operators reduce capital expenditures, operating expenses, and development costs for software-defined radio and 3/4G multi-mode base stations.
San Jose, CA, February 7, 2011 – Atmel® Corporation (NASDAQ: ATML), a leader in microcontroller and touch solutions, today announced the maXTouch(TM) E Series of single-chip capacitive touchscreen controllers for touchscreens from 2 to 12 inches. The mXT224E, mXT384E, mXT540E and mXT768E devices offer enhanced analog sensing with a third generation capacitive touch engine and Atmel’s advanced AVR® architecture optimized for capacitive sensing. Offering 224 to 768 nodes, the new series enables system designers to select the industry’s most advanced single-chip solution for their touchscreen size and application.
Since system noise poses the greatest challenge … Read More → "Atmel Announces New Generation of maXTouch Solutions"
The aicas group will introduce the new multiprocessor version of the JamaicaVM hard realtime Java runtime environment at the Embedded World conference in Nuremberg Germany from 1-3 March 2011. It is based on the proven JamaicaVM 6 product, which supports the J2SE Java 6 standard classes. Memory management has been optimized to simultaneously run multiple realtime threads on different CPUs with minimal contention. The assignment of Java threads to specific processor cores can be handled by JamaicaVM or directly controlled by the user. Even applications that were not built for multiprocessor systems can benefit from JamaicaVM 6 Multicore by running memory management … Read More → "JamaicaVM 6 is now available for multicore systems"