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MIPS Technologies Joins TSMC IP Alliance to Speed Customers’ Time-to-Market

SUNNYVALE, Calif. – October 12, 2010 – MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced that it has joined the TSMC (TWSE: 2330, NYSE:TSM) Soft IP Alliance Program to speed customers’ time-to-market. Through the Soft IP Program, TSMC is expected to provide specific design documents and technology information so that MIPS and other Alliance partners can optimize IP cores for TSMC’s process technologies. The companies will also collaborate on roadmap alignment to expedite … Read More → "MIPS Technologies Joins TSMC IP Alliance to Speed Customers’ Time-to-Market"

Full-featured Value Boundary-scan Developers Suite

Eindhoven, the Netherlands, October 2010. JTAG Technologies is delighted to announce a new economically-priced software and hardware system for board-level and system designers looking to benefit from a boundary-scan test and programming strategy.

Boundary-scan, or JTAG, testing has remained a powerful tool for identifying assembly faults such as open- and short-circuits, missing components and damaged devices since its introduction (as IEEE Std 1149.1) in 1990. However, while boundary-scan tools have been in use for almost 20 years, the relatively high cost of ‘professional’ systems has meant that they largely remain in the domain … Read More → "Full-featured Value Boundary-scan Developers Suite"

100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys’ In-Design Physical Verification

MOUNTAIN VIEW, Calif., Oct. 12 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its award-winning Galaxy™ Implementation Platform product, IC Validator, for In-Design physical verification within IC Compiler, has been successfully used for more than 100 tapeouts at advanced process nodes. Coming so soon after IC Validator’s 2009 launch, this milestone is a strong indicator of the requirement for a different physical verification use model. In contrast to the traditional stand-alone physical verification approach performed at the end of the design cycle, the new In-Design approach is … Read More → "100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys’ In-Design Physical Verification"

New DMMs Offer Fast Measurement Speeds, Easy Operation, Reliable Results

Agilent Technologies Inc. (NYSE: A) today introduced two digital multimeters (DMMs) to complement its growing family of PXI products. These new 6.5 digit PXI DMMs offer the industry’s highest measurement speeds within their price range, along with excellent accuracy and stability. Test engineers in aerospace, defense, electronic manufacturing and automotive industries now have an alternative when designing their mission-critical PXI test systems.

The M9182A 6.5 digit DMM and Read More → "New DMMs Offer Fast Measurement Speeds, Easy Operation, Reliable Results"

ARM and SMIC Extend Comprehensive Product Portfolio of Free Libraries of Physical IP to 65nm and 40nm LL Process Technology

CAMBRIDGE, England and SHANGHAI, Oct. 11 /PRNewswire-Asia/ — ARM and Semiconductor Manufacturing International Corporation (“SMIC”, NYSE: SMI and HKSE: 981) today announced an agreement to collaborate on the development of ARM leading physical IP library platform for SMIC 65nmLL and 40nm LL technology process nodes. This agreement will provide free access on the ARM DesignStart™ online IP access portal to library suites of 9-track and 12-track multi-Vt logic libraries, power management kits, ECO kits and ARM high density optimized memory compilers. The agreement extends the longstanding partnership to provide their mutual customers with highly differentiated IP on … Read More → "ARM and SMIC Extend Comprehensive Product Portfolio of Free Libraries of Physical IP to 65nm and 40nm LL Process Technology"

Agilent Technologies Demonstrates Test and Measurement Solutions at 4G World for Next Generation Mobile Devices and Basestations

What: See Agilent’s latest LTE, WiMAX, HSPA, MIMO, and Femtocell test and measurement solutions for R&D through Certification and Deployment.  This is the first public North American appearance  of Agilent’s  LTE user equipment(UE)  R&D test solution for PCT (protocol conformance test), data throughput, RF measurements and InterRAT.  The new Agilent N6070A series signaling conformance test for 3GPP LTE UE extends the capability of the recently introduced Agilent PXT Mobile Communications Test Set.  It offers a complete signaling conformance test solution which … Read More → "Agilent Technologies Demonstrates Test and Measurement Solutions at 4G World for Next Generation Mobile Devices and Basestations"

MoSys Participates at SMIC 2010 Technology Symposium

Who:         MoSys (NASDAQ: MOSY), a leading provider of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is participating as an Alliance Sponsor and is exhibiting at the SMIC 2010 Technology Symposiumin Santa Clara, Calif.

What:       The SMIC Symposium 2010 marks … Read More → "MoSys Participates at SMIC 2010 Technology Symposium"

4th Symtavision NewsConference on Timing Analysis with more than 100 delegates

Braunschweig, Germany – October6th 2010. Last week the 4th Symtavision NewsConference on Timing Analysis took place in Braunschweig. More than 100 delegates attended the annual event provided by Symtavision on September 29 and 30. With participants from all over Europe as well as Japan, Korea and Brasil this was in fact a world-wide meeting of leading timing experts from the automotive and avionics industry.  

“An Astonishing high bandwidth of participants! This conference could become THE Automotive … Read More → "4th Symtavision NewsConference on Timing Analysis with more than 100 delegates"

Mercury Releases OpenSAL – Open Source Version of Scientific Algorithm Library

CHELMSFORD, MA. – October 7, 2010 – Mercury Computer Systems, Inc. (NASDAQ: MRCY, www.mc.com), a trusted ISR subsystems provider, announced the availability of OpenSAL, an open source version of its award-winning Scientific Algorithm Library (SAL) for vector math acceleration. SAL is a high-throughput, low-latency signal processing library containing efficient algorithms with the fewest possible instructions and computing resources. OpenSAL provides a robust API, C code reference design and documentation for over 400 SAL math functions. 

“The introduction of OpenSAL is another example … Read More → "Mercury Releases OpenSAL – Open Source Version of Scientific Algorithm Library"

VisualSim Architect 10.3 increases engineering productivity using extensive emerging application templates, libraries and shorter simulation times to create accurate visual specifications

Sunnyvale, CA. — October 5, 2010 — Mirabilis Design Inc., a Silicon Valley software provider of system-level modeling and simulation solutions, announces the release of VisualSim Architect 10.3. This release has Model Templates for over 120 applications including multi-core; SoC and avionics power management; Network-on-Chip (NoC); high-performance storage; and real-time software design. Mirabilis Design is also announcing a new infrastructure with user-customizable graphical interface, new modeling components and interactive documentation.

Our user community has already realized massive productivity improvements from this release. The new NoC Template was used by a large Wireless Semiconductor company to model a Gigahertz-range multimedia SoC in approximately three … Read More → "VisualSim Architect 10.3 increases engineering productivity using extensive emerging application templates, libraries and shorter simulation times to create accurate visual specifications"

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