Gainesville, FL – June 3, 2025 – The 2026 Design and Verification Conference and Exhibition United States (DVCon U.S.), sponsored by Accellera Systems Initiative, is pleased to announce its Call for Extended Abstract, Workshop, and Tutorial Proposals. The 38th annual DVCon U.S. will be held March 2-5 at the Hyatt Regency Hotel, Santa Clara, CA.
“DVCon U.S. continues to be the premier venue for exploring the latest trends, technologies, and standards in design and verification,” stated Xiaolin Chen, DVCon U.S. 2026 General Chair. “We invite proposals that share real-world experiences, innovative methodologies, and forward-looking insights. Our goal is to deliver an exceptional technical program while preserving the personal connections and collaborative spirit that have long defined the DVCon experience.”
Extended Abstract Information
DVCon U.S. 2026 invites engineers, researchers, and practitioners to submit extended abstracts that provide deep technical insights, practical case studies, and innovative approaches across the design and verification landscape. Submissions should focus on real-world experiences and address emerging trends that are shaping the future of electronic system development.
Suggested topic areas include, but are not limited to:
- Functional verification and validation
- Safety-critical design and verification
- Low-power design techniques
- Machine learning and big data applications
- Design and verification reuse and automation
- Mixed-signal design and verification
Authors may also incorporate topics such as EDA tool usage, FPGA-based design, specialized verification languages (e.g., SVA or PSL), scripting, Portable Stimulus applications, AMS techniques, and IoT-related methodologies.
Extended abstracts should be between 600 and 1,200 words and demonstrate technical depth, innovation, and relevance.
More information and guidelines for DVCon U.S. 2026 abstract submissions can be found here.
Sponsored Short Workshop and Tutorial Information
DVCon U.S. 2026 welcomes proposals for technical tutorials and short workshops that offer high-impact educational content for design and verification professionals. These sessions provide an excellent opportunity for industry experts to share knowledge, demonstrate tools and methodologies, and engage directly with attendees.
Short workshops are 90-minute sponsored sessions open to all attendees registered for the full conference. Scheduled for both Monday and Thursday, these workshops may be formatted as hands-on demonstrations or lecture-style presentations, allowing flexibility in delivery and engagement.
DVCon U.S. technical tutorials are three-hour sessions included with full conference registration. The Technical Program Committee seeks proposals that are timely, highly relevant, and rich in continuing education value. Topics should address current challenges and trends in design and verification.
Suggested topics for both workshops and tutorials include:
- SystemVerilog for design and verification
- SystemC, C, and C++ in system-level design
- Software-driven and SoC verification
- Assertion-based verification (SystemVerilog, PSL)
- Coverage-driven verification and debug techniques
- Low-power design strategies and high-level synthesis
- Mixed-signal modeling and AMS verification
- Secure IP-based SoC design and encryption
- Transaction-level modeling, ESL design, and IP integration (IP-XACT)
- Portable Stimulus and standards adoption
- Formal methods, emulation, FPGA prototyping, and post-silicon debug
- Embedded software co-verification and productivity methods
- Functional safety, security, and open-source methodologies
- Machine learning applications in design and verification
Proposals should include an abstract between two to five paragraphs (not exceeding 1,000 words) that clearly outline the objective, technical depth, and value to attendees. For more details on DVCon U.S. 2026 workshop and tutorial proposal guidelines, including pricing, visit here.
Submission Deadline
The submission site for all proposals opens July 15. The deadline to submit extended abstracts, tutorial and workshop proposals is September 7, 2025.
For inspiration and to view proceedings from past conferences, visit the archives site.
About DVCon
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit here. Follow DVCon on Facebook, LinkedIn or @dvcon_us on X or to comment, please use #dvcon_us.
