LOUISVILLE, Colo. –– May 20, 2013 –– The 50th Design Automation Conference (DAC), the premier conference devoted to electronic design, design automation, IP and embedded systems and software, will feature, for the first time, a day of training tracks to keep designers updated on the latest techniques. Four tracks of training will be held on Thursday, June 6th, 2013. DAC 2013 will be held at the Austin Convention Center in Austin, Texas from June 2-6, 2013.
“This is the first year we have run a training day like this,” said Michael “Mac” McNamara of Adapt-IP and Tutorial Chair for DAC 2013. “The focus of the training is on four areas of increasing importance: SystemVerilog Design, SystemVerilog Verification, SystemC & TLM-2.0 and the ARM® Cortex® family of processors.”
“DAC has always been synonymous with updating the EDA user community on the very latest design techniques,” said Rob Hurley, Doulos CEO. “The Doulos passion is ‘Delivering Know-How’ using the latest and the greatest techniques and methods, so we’re excited this year to be collaborating with DAC and ARM to provide a whole day of skills-oriented training, covering key subjects in multiple tracks. We’re deploying some of the industry’s recognized subject matter experts to ensure that the whole DAC community will know that this year ‘Thursday is Training Day’.”
Each track of training is divided into two parts, a morning session from 9:00am to 12:30pm, and an afternoon session from 2:00pm to 5:30pm. All tracks are taught by a professional educator from Doulos, which is the global leader in the development and delivery of training solutions for engineers creating electronic products.
The four Training Tracks are:
- Track 1: SystemVerilog Design
- Part 1: Synthesis-friendly System Verilog
- Part 2: A Hardware Designers Guide to SystemVerilog Verification
- Track 2: SystemVerilog Verification
- Part 1: Hardcore SystemVerilog for Class-based Verification
- Part 2: Getting Started with UVM, the Universal Verification Methodology
- Track 3: ARM Accredited Engineer Program: ARM Cortex Family of Processors
- Part 1: Kick Start to the ARM Cortex Processor Family
- Part 2: Software Development for the ARM Cortex Processor Family
- Track 4: ESL and SystemC: The Definitive Guide to SystemC
- Part 1: The SystemC Language
- Part 2: TLM-2.0 and the IEEE 1666.2011 Standard
Details of all the training courses, including summaries, presenter information and room numbers, are all on the DAC website at www.dac.com. Book a seat when you register for DAC.
50th DAC Celebration
DAC is celebrating its 50th year as the premier conference devoted to the design and automation of electronic systems is the oldest and largest conference focused on EDA, embedded systems and software (ESS), and intellectual property (IP). The first DAC was held in 1964 in Atlantic City, New Jersey. Half a century later, DAC 2013 is a not-to-miss occasion for the worldwide community of system designers, system architects, IC designers, validation engineers, CAD managers, senior managers, executives, researchers and academics. Along with a robust technical program, the DAC Executive Committee has planned several memorable and exciting events listed below. Details of the event schedule can be found at www.dac.com under 50th DAC Celebration events.
- Sunday, June 2 – 5:30pm, Welcome Reception, Austin Convention Center
- Monday, June 3 – 5:00pm, Global Forum Exhibition unveiling, exhibit floor, booth #137
- Monday, June 3 – 8:00pm, 50th DAC Celebration Event at Austin City Limits. All DAC attendees and exhibitors are invited. A DAC badge is required to enter.
- Wednesday, June 5 – 7:30pm, 50th DAC Awards Banquet, Four Seasons Hotel Austin
About DAC
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 200 of the leading and emerging EDA, silicon, intellectual property (IP) and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic Design Automation Consortium (EDA Consortium), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM’s Special Interest Group on Design.
