26 September 2012 – Munich, Germany and Westford, MA, USA – Zuken, a leader in PCB Systems and IC Package design, has announced support for Xilinx’s Zynq-7000 All Programmable SoCs within its CR-8000 and CR-5000 PCB design suites.
Zuken’s Graphical Pin Manager (GPM) FPGA and PCB co-design environment now includes Xilinx’s Zynq-7000 All Programmable SoCs, and 7 series FPGAs, within its device library.
This allows designers working with CR-8000 and CR-5000 to use Xilinx’s programmable devices early in the design process and access a wider range of silicon devices in GPM. This provides designers with a complete FPGA/PCB co-design environment, and employs GPM to help manage, optimize, and intelligently communicate pin assignments anytime during the co-design process.
Xilinx’s Zynq-7000 family is the industry’s first SoC family to incorporate an ARM® dual-core Cortex™-A9 MPCore™ processing system with tightly coupled programmable logic on a single die. This combination offers designers a dramatic increase in system performance, while reducing total power consumption to achieve a lower running cost than traditional two chip solutions. The all programmable nature of the Zynq-7000 devices enable OEMs to accelerate time-to-market, focus on product innovation and reprogram their products to meet changing standards and specifications.
“We welcome Zuken’s support for Xilinx’s Zynq-7000 family of All Programmable SoCs, and are confident that this development will help designers significantly accelerate the design process for a broad range of applications,”
Mark Jensen, Director, Embedded Systems Software/Tools Marketing, Xilinx Inc.
“In the competitive electronic equipment industry, the speed with which EDA vendors can offer the latest device-based design environments determines when customers can launch new products or take advantage of new business opportunities,”
“This ongoing partnership with Xilinx offers GPM support for their advanced devices in response to customers’ needs.”
Kazuhiro Kariya, Zuken’s Chief Technical Officer.
GPM features
GPM optimizes pin assignment when co-designing the logical and physical circuits of PCBs, reflecting design changes directly to the logical and physical circuits and vice versa. In addition, libraries such as circuit symbols and footprints based on different criteria or attributes, such as I/O banks, are generated automatically. This results in optimized, highly-efficient and high-quality circuit/board design processes for FPGA components.
GPM device library
The latest device library containing Zynq-7000 family information is available for Zuken users to download at Zuken Global Support: https://support.zuken.co.jp/global/home
- For more information on GPM, visit www.zuken.com/gpm
- For more information on Zynq-7000, visit: www.xilinx.com/zynq-7000
