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CoFluent Design Delivers Embedded System Virtualization Solution Based On UML

Nantes, France – FEBRUARY 16, 2010 – CoFluent Design™, a leading Electronic System Level (ESL) company that provides system-level modeling and simulation to accelerate innovation in embedded devices, today announced that it has developed a new methodology that combines the OMG’s (Object Management Group) standards UML (Unified Modeling Language), SysML (System Modeling Language) and MARTE (Modeling and Analysis for Real-Time and Embedded Systems) profile.

The CoFluent methodology for UML allows designers of embedded devices and chips to describe in a comprehensive way models of real-time embedded applications and use cases, and represent their execution on multiprocessor/multicore platforms. Non-functional requirements, like execution times, as well as power, memory and cost, can be captured in models.

By exporting UML models to CoFluent Studio – CoFluent Design’s Eclipse-based system-level modeling and simulation environment – designers can use C/C++ as action language and generate transaction-level modeling (TLM) SystemC code to run simulations.

The instrumented SystemC code coupled with CoFluent Studio’s analysis tools allows designers to observe the real-time execution of their models and extract performance figures like latencies, throughputs, buffer levels, resource loads, power consumption, memory footprint and cost.

CoFluent Design has been working with customers and partners on UML-based embedded system virtualization for the last six years in the context of internal and collaborative European R&D projects, including the EUREKA-ITEA programme’s MARTES and SYSTEM@TIC PARIS-REGION cluster’s Lambda projects.

“UML, SysML and MARTE profiles are standard languages but they come without guidelines explaining how to use them. This is like ingredients without a recipe,” said Vincent Perrier, Co-Founder and Chief Technical Officer of CoFluent Design. “Each profile provides complementary aspects needed for modeling real-time multicore systems, but until now no combined usage was proposed in a comprehensive way. CoFluent has employed its extensive experience in embedded system modeling and simulation to deliver an effective method to the embedded developers’ community,” added Vincent Perrier.

“By offering a link from UML to CoFluent Studio and its automatic SystemC code generation, CoFluent Design makes UML models executable and applicable for multicore system virtualization and performance prediction,” said Stéphane Leclercq, Chief Executive Officer of CoFluent Design. “But it also answers a long-awaited question from the industry by bridging the gap from UML to SystemC. SystemC is the language of choice for system-on-chip (SoC) virtual platform modeling. Now SoC providers can verify and validate their virtual platforms with use cases described in UML,” added Stéphane Leclercq.

A white paper describing the CoFluent methodology for UML is freely available for download from CoFluent Design’s website.

CoFluent Design also announces partnership with leading UML tool provider No Magic in a separate press release.

CoFluent Design will exhibit on March 2-4, 2010, at Embedded World 2010 in Nuremberg, Germany, on the UBIFRANCE Booth # 9-477g where a pre-release of the CoFluent Studio-MagicDraw integration will be demonstrated.

CoFluent Design will also exhibit at the ESC (Embedded Systems Conference) Silicon Valley in San Jose, California, on April 26-29, 2010.

About CoFluent Design:

CoFluent Design™ provides system-level modeling and simulation tools for executing use cases and analyzing performance of embedded devices and chips. CoFluent Studio™ generates SystemC transactional models from UML diagrams and standard C that describe complex multi-OS, multicore embedded systems. CoFluent Reader™ enables efficient exchange of executable specifications with all project stakeholders and contractors.

CoFluent is used throughout the product development lifecycle for:

  • Innovation: capturing with minimal effort the design intent in reusable models that mix new features and legacy, allowing for early patent application
  • Optimization: finding the optimal architecture and power efficiency through design space exploration free of the full hardware/software code
  • Validation: defining use case scenarios for validating the real-time behavior, predicting performance and generating test cases for implementation

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