The next process node is coming faster and faster with every passing press release. This week we’re taking a closer look at the brand new 14nm test chip rolled out by Cadence, ARM, and IBM, and we’re looking into the new nanotube memory technology being developed by IMEC and Nantero. Speaking of breaking new ground, my guest this week is Brad Quinton (Tektronix) and we’re going to chat about the most recent developments in FPGA prototyping, what Brad sees as the biggest problems for FPGA prototyping today, and why embedded instrumentation can be more effective than physical instruments.

Also this week, I dig into Amelia’s Mailbag and give everyone the chance to win an LX9 Spartan-6 MicroBoard courtesy of Xilinx.

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Fish Fry Links – November 2, 2012

Cadence Announces Tapeout of 14nm Test-Chip With ARM Processor and IBM FinFET Process Technology

Imec and Nantero Launch Joint Carbon Nanotube Memory Program for High-Density Next-Generation Memory Below 20nm

Tektronix Revolutionizes ASIC Prototyping with New Software-Based Debug Solution

Feature Article by Kevin Morris: Tektronix Shakes Up Prototyping – Embedded Instrumentation Boosts Boards to Emulator Status

More Information about the Spartan-6 LX9 MicroBoard

Instagram Photo of Amelia with this week’s Nerdy Giveaway

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Package Evolution for MOSFETs and Diodes

Sponsored by Mouser Electronics and Vishay

A limiting factor for both MOSFETs and diodes is power dissipation per unit area and your choice of packaging can make a big difference in power dissipation. In this episode of Chalk Talk, Amelia Dalton and Brian Zachrel from Vishay investigate how package evolution has led to new advancements in diodes and MOSFETs including minimizing package resistance, increasing power density, and more! They also explore the benefits of using Vishay’s small and efficient PowerPAK® and eSMP® packages and the migration path you will need to keep in mind when using these solutions in your next design.

Click here for more information about Vishay Semiconductors Signal DFN Package

Jul 10, 2023

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14 Nanometers and Counting

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