fish fry
Subscribe Now

Getting Your Verification Ducks in a Row

Look out! A new way to verify is coming your way. In this week’s Fish Fry, I check out Synopsys’s new Verification IP announcement with a special in-depth interview with Neil Mullinger from Synopsys. Neil and I discuss the details of this new verification platform, what markets it’s destined for, and why whipping up your own verification IP may be a thing of the past. Also this week, I look into a new development in transistor technology headed up by a team at the University of Tel Aviv and why it may or may not involve deli meat. 

I’ve got another MAX V CPLD Development Kit (courtesy of Altera) to give away this week, but you will have to listen to find out how to win.

 

Watch Previous Fish Frys

Fish Fry Links – March 16, 2012

Synopsys Unveils Next-Generation Verification IP for Faster SoC Verification 

More Information about Verification IP from Synopsys

More Information about Protein based transistors

More information about Altera’s MAX V CPLD Development Kit

Email Amelia Dalton

Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

John Bruggeman, Former CMO – Cadence Design Systems

Darrin Billerbeck, CEO – Lattice Semiconductor

Lauro Rizzatti, Vice President of Marketing, EVE

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Kapil Shankar, Former CEO – SiliconBlue

Andy Pease, CEO – QuickLogic

Rajeev Madhavan, Former CEO – Magma 

Paul Kocher, President – Cryptography Research Inc.

Anupam Bakshi, CEO – Agnisys


Leave a Reply

featured blogs
Aug 4, 2020
In July we rolled out a major update to our Cart, added a few tweaks to the Video Search page, added several new training videos, and updated content in a variety of places. Here are the major website updates for July 2020. Upgraded and Redesigned Cart Experience You’ll...
Aug 4, 2020
Installation of software applications depends upon certain factors such as system configuration, the number of files getting installed, and network speed. Installation time is influenced by a change... [[ Click on the title to access the full blog on the Cadence Community si...
Jul 31, 2020
[From the last episode: We looked at the notion of sparsity and how it helps with the math.] We saw before that there are three main elements in a CNN: the convolution, the pooling, and the activation . Today we focus on activation . I'€™ll start by saying that the uses of ...
Jul 31, 2020
Well, things just took an unexpected turn and I now have a '€œHmmm, that'€™s very interesting'€ look on my face....

featured video

Product Update: Protect IoT SoCs with DesignWare OTP NVM IP

Sponsored by Synopsys

Join Krishna Balachandran in this discussion on Synopsys DesignWare OTP NVM IP, including security, performance, power, and cost considerations. With more than 12 years of development and deployment by 500+ customers, Synopsys is the leader in antifuse-based OTP NVM IP.

Click here for more information about Synopsys DesignWare OTP NVM IP

Featured Paper

Improving Performance in High-Voltage Systems With Zero-Drift Hall-Effect Current Sensing

Sponsored by Texas Instruments

Learn how major industry trends are driving demands for isolated current sensing, and how new zero-drift Hall-effect current sensors can improve isolation and measurement drift while simplifying the design process.

Click here for more information

Featured Chalk Talk

AVX Supercapacitors: PrizmaCap

Sponsored by Mouser Electronics and AVX

If your application requires a supercapacitor, there are a lot of options. You need the right form factor, temperature range, weight, and capacitance, of course. In this episode of Chalk Talk, Amelia Dalton chats with Eric DeRose of AVX about choosing the right supercapacitor and about PrizmaCap - a new supercapacitor with low height, high temperature, and lightweight.

Click here for more information AVX PrizmaCap™