fish fry
Subscribe Now

The Humorization of EE

A Look Into How Lattice Semiconductor Makes Even FPGAs Funny

If anyone tells you that EE can’t be funny, you send ’em my way! In this week’s Fish Fry, I interview Chris Turman, one of the funniest engineers in the business, about how the culture at Lattice Semiconductor has allowed him the freedom to have fun and make people laugh about FPGAs. Yes, really.  Also this week, I check out the new pico-projector from Texas Instruments and Brookstone and report on why it may be fantastic and problematic at the same time.

 

Watch Previous Fish Frys

Fish Fry Links – December 2, 2011 

LatticeECP3 FPGA Jamz Music Video

Power Manager Pickle Power

MachXO2 Infomercial (My Favorite)

New TI/Brookstone Picoprojector

Circuit Board Nerdy Giveaway

Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

John Bruggeman, Former CMO – Cadence Design Systems

Darrin Billerbeck, CEO – Lattice Semiconductor

Lauro Rizzatti, Vice President of Marketing, EVE

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Kapil Shankar, CEO – SiliconBlue

Andy Pease, CEO – QuickLogic

Rajeev Madhavan, CEO – Magma 

Paul Kocher, President – Cryptography Research Inc.


Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Medical Grade Power
Sponsored by Mouser Electronics and RECOM
In this episode of Chalk Talk, Amelia Dalton and Louis Bouche from RECOM explore the various design requirements for medical grade power supplies. They also examine the role that isolation and leakage current play in this arena and the solutions that RECOM offers in terms of medical grade power supplies.
Nov 9, 2023
21,736 views