chalk talk
Subscribe Now

IDesignSpec: Executable Register Specification

Getting RTL right for your chip design is a difficult engineering and verification challenge with very high stakes. And, most of us use a variety of tools – including spreadsheets and text documents – to capture our design intent and details. In this episode of Chalk Talk, Amelia Dalton chats with Anupam Bakshi from Agnisys about some great solutions for getting from design specifications into verified RTL.

Click here for more information about IDesignSpec.

Click here to evaluate a full version of IDesignSpec.

Click here for more information about ARV.

Click here to evaluate a full version of ARV.

 

Name : Anupam Bakshi
Designation :CEO, Agnisys Inc.
Twitter : @bakshia 

Leave a Reply

featured blogs
Feb 8, 2023
Part of the PCIe 6.0 specification, learn how the TEE Device Interface Security Protocol (TDISP) secures I/O virtualization & enables secure key exchange. The post New PCIe TDISP Architecture Secures Device Interfaces with Virtual Servers appeared first on From Silicon ...
Feb 8, 2023
At the recent Chiplet Summit, there was a panel session on the last afternoon titled How to Make Chiplets a Viable Market . The panel was moderated by Meta's Ravi Agarwal, and the panelists were (from left to right in the photo): Travis Lanier of Ventana Micro Systems......
Jan 19, 2023
Are you having problems adjusting your watch strap or swapping out your watch battery? If so, I am the bearer of glad tidings....