For years, layout tools have focused on the pins and wires, the “froms” and “tos”, the segments and nets – without considering that they were really creating a complex electrical circuit. Today, however, the electrical properties of our layout is critical, and issues like parasitic resistance and capacitance can have a dramatic effect on our final design. In this episode of Chalk Talk, Amelia Dalton chats with John Stabenow of Cadence about electrically-aware design with Cadence’s Virtuoso.
July 28, 2014
