Conventional wisdom says that Charles Dickens’s novels are so long because he was paid by the word. This is not strictly true, as his novels were published in serial form, and Dickens was paid by the installment. The net result is the same, however, as the volume of reading required to mine the gold from his classic works is legendary. Plot lines that could reasonably be summarized in a few succinct paragraphs drag on through chapter after chapter of flowery, flowing, profitable prose.

It appears sometimes that the PR professionals in FPGA and … Read More → "Thinking Like Xilinx"

Sometimes, even the experts get fooled. Anybody who is intimately familiar with the FPGA industry would probably have predicted the same thing. With the epic Godzilla versus Mothra game of marketing and product one-upsmanship raging between rivals Xilinx and Altera for the past decade, the next move is often simple to anticipate. In the most recent rounds of action: Xilinx packs a hard punch introducing low-cost Spartan-3 as the first 90nm FPGA. Altera strikes back with Stratix-II as the first 90nm high-speed, high-density flagship offering. Each side then counters with the piece they’re missing, Altera with Cyclone … Read More → "SerDes Sweet Spot"

At HARDI Electronics, we started working seriously with ASIC prototyping in FPGAs about five years ago, and we quickly realized what the challenges were. First, it was obvious that the prototyping system needed to have the required capacity corresponding to the gate size of the ASIC. In year 2000, that was quite a problem since maximum FPGA capacity was a couple of hundred thousand ASIC gates and the ASICs were 10-100 times larger (1-10 million gates). Since then, the FPGA gate capacity has grown significantly. Today the largest available FPGA, the Xilinx Virtex-4 LX200, has an equivalent ASIC gate capacity … Read More → "How to Make An ASIC Prototype"

It’s a lifelong dream for many people to actually fly a plane on their own. The daring, carefree, wind-in-your hair pilot personality, however, is a bit of a myth. In real life, a good pilot is more like a good engineer. You plan and check everything meticulously. You want to find and fix any potential problems before you leave the ground, because once the wheels are up, it’s too late. Imagine you’ve been taking flying lessons now for several months, and you’ve finally logged the training hours, completed all of your … Read More → "Top-Flight Prototypes"

When FPGAs flirted with the million-ASIC-gate density for the first time, a bell went off in many designers’ heads. This was not the tinny tintinnabulation of a bouncy little bicycle bell telling them, “Be alert, cyclist coming through.” No, this was the foul, foreboding clang of calamity to come. This was the thousand-ton tanker train of timing-closure nightmares turning around to bear down on them again from a new direction, threatening to bring back that all-too recent memory of indeterminate iteration in their ASIC design process to cause chaos in their new, happy, FPGA lives.