Achieving timing closure in today’s increasingly large and complex digital integrated circuit designs – irrespective of whether they are realized using FPGA, Structured ASIC, or even Standard Cell ASIC fabric – is becoming evermore problematic with the latest design targets running at aggressive clock speeds.

The majority of today’s designers typically code in RTL using Verilog or VHDL. Also, there is some use of C/C++/SystemC coupled with behavioral synthesis technology in certain application areas. Unfortunately, both of these approaches have specific, but different, disadvantages associated with them. As we shall see, … Read More → "Are You Designing with Too Many Significant Figures?"

I was at DATE 2006, a tradeshow in Germany. My cell phone started buzzing with calls, voicemails and e-mail. People were stopping me on the show floor – pulling me aside, whispering rapidfire questions – always small variations on a theme. “Did you hear that LSI Logic is killing RapidChip? Do you think that structured ASIC is dead? Are other structured ASIC vendors pulling out as well? Will FPGAs wipe out the structured and platform ASIC space entirely? What’s Altera doing? What about ChipX? Isn’t AMI doing structured as well? Has eASIC been acquired yet? What have … Read More → "Ask for Whom the Bell Tolls"

Abstract

Use of a generic FPGA board together with a powerful programming environment is investigated. It is demonstrated that high-performance real-time analysis is achieved at a reasonable cost. The system is simple to integrate with off-the-shelf acquisition systems such as LabVIEW. A flexible wavelet algorithm is programmed and is found to be considerably faster than the processor of the host computer. The flexibility of the processing unit makes it a promising tool for applications where ordinary desktop computers do not provide enough processing power.

Research-oriented experimental equipment must often offer high-performance … Read More → "Field Programmable Gate Arrays for Flexible and Fast Data Processing"

My twenty-three-year-old eyes couldn’t muster the maturity to disguise my frustration. He sensed their weakness. It was what he was watching for. Even as I struggled in vain to regain my composure, he moved in for the kill. “What did you say again that your company does?” My father posed the question, fully aware of the answer, waiting with the patience of the hunter who has already cornered his prey for my inevitable self-destruction.

I rolled into my own defeat with the resignation of a mortally wounded rabbit. “Gate arrays,” I … Read More → "What Do You Tell Them?"

The new generation of FPGAs with DSP resource and embedded processors are attracting the interest of the image processing market. With enhanced capabilities most of the DSP processing work can be off loaded from the software program stack to embedded processors and DSP resources on the FPGA to improve performance and reduce the cost of the whole system.

The traditional way of implementing algorithms in software limits the performance because the data is processed serially. Frequency of operation can be increased up to a certain extent to increase the performance or the required data rate … Read More → "Image Processing Applications On New Generation FPGAs"

It slices, it dices, and it has flash-memory. It gets your whites whiter, removes those collar rings, and flaunts flexible FPGA fabric. It has more flavor, is less filling, and boasts programmable analog to boot. It softens your hands while you do the dishes and offers a wide selection of pre-configured IP. Now how much would you pay? Well don’t answer that because now, Actel’s already incredible versatile Fusion programmable system chips also pack an available ARM7 processor.

Actel’s claims about Fusion sound like something from one of those impossibly overblown … Read More → "Fusion Adds ARM"