How often has it happened that you have just finished a complex module for an FPGA project only to later find out that a very similar module was completed a month earlier by another team within the company? Not only have you just wasted several weeks of your time, but this wasted time has also cost the company money. A quick way to become a hero by saving the company both time and money is to put in place a simple reuse repository to prevent this scenario from ever happening again.

Today many design teams and companies … Read More → "Building an FPGA Design Repository"

In classical music, they are the organists.

My brother, an accomplished professional trumpet player, had just completed a performance for solo piccolo trumpet and organ.  I was looking at his immaculately maintained instrument and noticed that one of the tuning slides was so light, it seemed it could just fall off the horn if the performer held it at the wrong angle.

“What would you do if this fell off during a performance?” I asked.

Seemingly without thinking, he replied “Oh, the organist would catch it and replace it.& … Read More → "Renaissance FAEs"

A few years ago when SERDES became available on FPGAs, they were exotic. Both for the FPGA guys and for their users. The FPGA guys had to learn how all this stuff worked, tune the (relatively) complicated analog circuits, and make it all function. Those were some of the last features to be officially released on those devices because they just took longer to get right. More than one customer was stranded waiting for parts with working high-speed I/Os.

Meanwhile, there weren’t a lot of customers who knew what to do with this stuff. … Read More → "Two Chips Or One?"

Picture this architecture – a high speed application processor doing control coupled to an accelerator comprised of a mass of processing elements ready to power-parallelize compute-intensive components of a complex problem.  Sound familiar?  Supercomputers have taken advantage of acceleration using schemes like this for a while.  People using FPGAs for co-processors do it all the time.

Now, picture a new chip with 1.4 billion transistors, an array of 240 cores, and a processing throughput equivalent to about 1 TeraFLOPS.  Many readers of this publication would probably guess a new FPGA, right? 

With the … Read More → "A Passel of Processors"