DUESSELDORF (Germany), KAWASAKI (Japan), SANTA … Read More → "NEC Electronics Announces Development of Ethernet PHY Family for Industrial Automation Systems"
Bielsko-Biala/Poland, November 24th, 2009 – The silicon intellectual property (IP) provider, Evatronix SA, today announced its NAND Flash memory controller has been updated to meet the latest specifications of the Open NAND Flash interface (ONFi) and now fully supports the newest High Speed NAND Flash. This allows development of applications that will leverage the ability of new memory technologies to operate with speeds of up to 200 MB per second.
SYDNEY, Australia – November 24, 2009& … Read More → "Instant prototyping – in the time it takes to make a cup of coffee"
MOUNTAIN VIEW, Calif. – November 24, 2009 – Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the release of a broad range of data converter IP solutions for 40 nanometer (nm) process technologies. The IP is targeted at broadband wireless communications, wired communications and video designs requiring high-performance, ultra-low power consumption and very compact area. With this latest addition, Synopsys’ DesignWare(r) Data Converter IP portfolio now offers more than 100 data converter IP products comprised of analogue-to-digital converters (ADCs) and digital-to-analogue converters (DACs) supporting Oversampling, Pipeline, Sigma-Delta, SAR and Current Steering architectures. By … Read More → "Synopsys expands DesignWare Data Converter IP portfolio with 40nm solutions"
Embedded Artists and Timesys Promote Linux Solution for NXP’s LPC3131 Microcontroller
Malmo, Sweden & Pittsburgh, PA, USA – November 23rd, 2009
Embedded Artists AB (http://www.embeddedartists.com) and Timesys® Corporation (Read More → "Embedded Artists Offers Free Trial Access for Timesys LinuxLink"
San Jose, CA, November 23, 2009 – Atmel® Corporation (Nasdaq: ATML) today announced three new 6-pin picoPower® AVR® microcontrollers. The ATtiny4, ATtiny5, and ATtiny9 are pin- and code- compatible, include a rich feature set, and execute code 6-times faster than the closest competitor.
Using the AVR CPU, the 6-pin tinyAVR® microcontrollers can process up to 12 MIPS at 12 MHz, six times the performance of any other similar sized microcontroller in the market. This processing efficiency significantly reduces the time in active mode and increases the time spent in power saving sleep modes. Combined with Atmel’s picoPower … Read More → "Atmel Expands 6-pin AVR Microcontroller Family"
Company Set to Address Growing Demand for VxWorks/x86 Embedded Systems
San Diego, CA, November 23, 2009 — Aonix®, a provider of solutions for safety and mission-critical applications, today announced the release of ObjectAda® Real-Time 8.4 for Windows, targeting Intel x86 architecture embedded and real-time systems running the Wind … Read More → "Aonix Adds VxWorks/Intel® Architecture Target Support to ObjectAda Product Line"
WITTENSTEIN High Integrity Systems has announced integrated Memory Protection Unit (MPU) support for Cortex-M3 microcontrollers in its OpenRTOS kernel.
The MPU protects applications from undetected programming errors as well as those caused by system failure.
The integrated MPU support is easy to use, protects the kernel from invalid task executions and prevents data corruption. Peripherals can also be protected from unintended modification by tasks. Furthermore, un-trusted code is isolated and the detection of task stack overflows is guaranteed.
Tasks run in either ‘Privileged’ or ‘User’ mode. User mode tasks can access their … Read More → "OpenRTOS adds integrated memory protection support for Cortex-M3"
Technical User Presentations Explore Virtual Platforms, Power Analysis, SoC Modeling and More
WHO: The Open SystemC Initiative (OSCI), an independent, non-profit organization dedicated to supporting and advancing SystemC™ as an industry-standard language for electronic system-level (ESL) design, announced the European SystemC User Group (ESCUG) will host its twentieth meeting Dec. 1, 2009 in Grenoble, France. For the first time, the meeting will be co-located with IP-ESC 2009, a technical conference focused on intellectual property (IP) based system-on-chip (SoC) design. Event registration as well as a full agenda for ESCUG is available at Read More → "European SystemC Users Meeting @ IP-ESC 2009"
-- Lowest Cost, Lowest Power Programmable SRIO Solution in the Industry --
HILLSBORO, OR -- NOVEMBER 23, 2009 -- Lattice Semiconductor Corporation
(NASDAQ: LSCC) and Praesum Communications today announced the availability of the
Serial RapidIO 2.1 endpoint soft IP core for the LatticeECP3™ FPGA family.
The core supports 1x, 2x and 4x lane configurations at up to 3.125Gbps lane speeds, </ … Read More → "Lattice Announces First Low Cost FPGA With Serial RapidIO 2.1 Support"
