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A compact FPGA Module with Fast Ethernet

The Mars MX1 FPGA module is equipped with two fully EtherCAT compatible Fast Ethernet PHYs and a fast DDR2 SDRAM. Therefore it is predisposed for SoPC systems with a soft-core processor and real-time Ethernet access.

Mars MX1 is built around Xilinx’s most recent low-cost FPGA, the Spartan-6 LX. The module comes in two standard configurations which are both fitted with a 128MB DDR2 SDRAM, 16MB SPI-Flash and a Real-Time-Clock. The modules are … Read More → "A compact FPGA Module with Fast Ethernet"

A compact FPGA Module with Fast Ethernet

The Mars MX1 FPGA module is equipped with two fully EtherCAT compatible Fast Ethernet PHYs and a fast DDR2 SDRAM. Therefore it is predisposed for SoPC systems with a soft-core processor and real-time Ethernet access.

Mars MX1 is built around Xilinx’s most recent low-cost FPGA, the Spartan-6 LX. The module comes in two standard configurations which are both fitted with a 128MB DDR2 SDRAM, 16MB SPI-Flash and a Real-Time-Clock. The modules are … Read More → "A compact FPGA Module with Fast Ethernet"

Agilent Technologies Introduces Industry’s First Scope-Based JTAG Protocol Application

SANTA CLARA, Calif., June 1, 2010 — Agilent Technologies Inc. (NYSE: A) today expanded its Infiniium oscilloscope application portfolio with a Joint Test Action Group (JTAG) protocol decode and triggering application. Agilent’s Infiniium Series is the first oscilloscope family to support JTAG triggering and protocol decode.

< … Read More → "Agilent Technologies Introduces Industry’s First Scope-Based JTAG Protocol Application"

Jasper Crosses the Design-to-Verification Chasm

MOUNTAIN VIEW, Calif. – June 2, 2010 – Jasper Design Automation, provider of advanced formal technology solutions, today announced new versions of ActiveDesign™ and JasperGold® with capabilities that bridge the divide between chip design and verification by sharing a common, persistent knowledge base.

Jasper’s ActiveDesign with Behavioral Indexing™ lets users design, concurrently modify, and verify their RTL code, then store it in a persistent database containing both the RTL itself and an “index” of its elastic behaviors.  This information is shared downstream with the& … Read More → "Jasper Crosses the Design-to-Verification Chasm"

North American SystemC User’s Group Hosts Co-Located Meeting at DAC

WHO: The Open SystemC Initiative (OSCI), an independent, non-profit organization dedicated to supporting and advancing SystemC™ as an industry-standard language for electronic system-level (ESL) design, announces the next North American SystemC User’s Group (NASCUG) meeting. Co-located with the 2010 Design Automation Conference (DAC), the event is free to industry professionals and the media with advance registration at: www.mod-marketing.com/osci/.

WHAT/WHEN: NASCUG XIII meeting, Sunday, June 13, beginning 2:30pm. The event is sponsored by ARM Ltd.; … Read More → "North American SystemC User’s Group Hosts Co-Located Meeting at DAC"

The Last Silicon Standing

We’ve heard it so often, we don’t even hear it anymore.

Every process node is twice as expensive as the last.  The non-recurring engineering (NRE) associated with designing a new digital semiconductor chip has been increasing exponentially right along with the transistor capacity.  Fewer and fewer companies can afford to do a custom chip.  The minimum volume at which one can expect to recoup the NRE is increasing every year.  ASIC design starts are dropping precipitously.  ASSP designs are also on the decline.

Lattice Seminar Shows How To Cut Power Management Costs Up To 50%, Improve Reliability And Reduce Risk

HILLSBORO, OR — JUNE 1, 2010 — Lattice Semiconductor Corporation (NASDAQ: LSCC), as part of its commitment to increase convenience for designers, today announced the free “Power 2 You!” seminar series.  Based on the recently released Power 2 You design guide, these seminars describe the design of a variety of power management functions, and show how to integrate them cost effectively into Lattice Power Manager II devices.  These power management solutions can then be individually customized for a wide range of applications using Lattice’s PAC-Designer® software.

The seminars review common power management topics such as power … Read More → "Lattice Seminar Shows How To Cut Power Management Costs Up To 50%, Improve Reliability And Reduce Risk"

Microsoft Outlines Business Opportunities for Hardware Makers Across Windows Platform

TAIPEI, Taiwan — June 1, 2010  During a keynote address tomorrow at COMPUTEX TAIPEI, Steve Guggenheimer, corporate vice president of the Original Equipment Manufacturer (OEM) Division at Microsoft Corp., will outline how the company continues to deliver expanded partner opportunities to support rich and connected experiences. Product demonstrations will showcase the diversity and breadth of devices supported across the Windows platform, including desktop PCs, smartphones, netbooks, laptops, tablets, slates, game consoles, set-top boxes and servers. He will also discuss the enthusiastic response from partners and the larger market to the latest version of the … Read More → "Microsoft Outlines Business Opportunities for Hardware Makers Across Windows Platform"

SiS Selects MIPS® Processor IP for SoCs Targeting Mobile Internet Devices with Android™ Platform

COMPUTEX TAIPEI, Taiwan – June 1, 2010 – MIPS Technologies, Inc. (NASDAQ: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, announced today that Taiwan’s Silicon Integrated Systems Corp. (SiS) licensed IP from MIPS Read More → "SiS Selects MIPS® Processor IP for SoCs Targeting Mobile Internet Devices with Android™ Platform"

Xilinx to Showcase Beamforming and Fusion Tracking System at 2010 Military & Aerospace Electronics Forum

SAN JOSE, Calif., June 1 — Xilinx, Inc. (NASDAQ:XLNX) today announced its participation at the Military & Aerospace Electronics Forum (MAEF) at the San Diego Convention Center, June 3-4, 2010. The company will show how its industry-leading Virtex® and Spartan® series FPGAs, IP and development tools can be used by system architects to drive beamforming, DO-254 design assurance, missiles defense, UAV reconnaissance and surveillance applications.

What: Military & Aerospace Electronics Forum 2010

Where: San Diego Convention Center, Booth #554</ … Read More → "Xilinx to Showcase Beamforming and Fusion Tracking System at 2010 Military & Aerospace Electronics Forum"

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