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StarChip announces the successful tape-out of its 32bit-Secure Chip SIM platform based on Cortus APS3 processor

June 10 2010  StarChip, high volume, secure microcontroller design expert, announces the tape-out of its 32bit-Secure chip SIM platform. This new technology includes Flash secure 32-bit SIM architecture based on Cortus APS3S core and providing high-level endurance management, fast personalization mode and fully secure lifecycle handling.

< … Read More → "StarChip announces the successful tape-out of its 32bit-Secure Chip SIM platform based on Cortus APS3 processor"

IC Manage Announces Global Design Data Management for Synopsys’ Galaxy Custom Designer Solution

LOS GATOS, Calif., June 10 /PRNewswire/ — IC Manage, Inc., the leading provider of project and design data management solutions for the electronics industry, today announced the integration of Synopsys’ Galaxy Custom Designer® solution and IC Manage Global Design Platform™(GDP). Engineers can now efficiently manage and share Custom Designer’s design data across multiple design sites.

The integration of GDP and Galaxy Custom Designer provides advanced project and design data management capabilities within Custom Designer’s familiar user interface, giving design teams version control, configuration and derivative management, as well as design data hand-offs and bug … Read More → "IC Manage Announces Global Design Data Management for Synopsys’ Galaxy Custom Designer Solution"

UMC Adopts Magma’s SiliconSmart ACE for Standard Cell and I/O Cell Characterization and Modeling

SAN JOSE, CALIF., June 10, 2010 — Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, today announced that UMC has standardized on SiliconSmart ACE for standard cell and I/O cell characterization and modeling. UMC conducted a thorough evaluation of multiple IP characterization tools from leading electronic design automation (EDA) vendors. SiliconSmart ACE was shown to meet the accuracy, throughput and quality of results UMC required. Magma’s world-class technical support was also influential in UMC’s decision to standardize on SiliconSmart ACE.

Read More → "UMC Adopts Magma’s SiliconSmart ACE for Standard Cell and I/O Cell Characterization and Modeling"

Calypto Extends Industry Lead in RTL Power Optimization

SANTA CLARA, Calif. – June 8, 2010 – Calypto Design Systems Inc., the leader in sequential analysis technology, today announced the release of PowerPro 4.0, the latest version of the industry’s most advanced RTL power optimization product family.  Providing sweeping improvements to PowerPro CG, PowerPro MG and PowerPro Analyzer, PowerPro 4.0 offers enhanced power optimization and usability features, enabling … Read More → "Calypto Extends Industry Lead in RTL Power Optimization"

Mentor Graphics Works with TSMC to Speed SoC Verification with Calibre Automatic Waivers

WILSONVILLE, Ore., June 10, 2010—Mentor Graphics Corporation (NASDAQ: MENT) today announced that Taiwan Semiconductor Manufacturing Corporation (TSMC) has completed technical validation of  the Calibre® Automatic Waivers solution and is in the process of adopting it to speed verification of large SoCs. The new facility allows TSMC, their IP ecosystem, and customers to attach design rule checking (DRC) waivers to their IP datasets so that waived violations will not appear during verification runs. This cuts down on DRC debugging as well as unnecessary interactions between the designer and … Read More → "Mentor Graphics Works with TSMC to Speed SoC Verification with Calibre Automatic Waivers"

Magma’s Talus IC Implementation System Supports TSMC 28-nm Process Technology Through Reference Flow 11.0

SAN JOSE, Calif., June 10, 2010 – Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, today announced that Magma’s Talus® and Quartz™ integrated circuit (IC) implementation and physical verification solutions have been included to support the TSMC Reference Flow 11.0. Through TSMC’s Open Innovation Platform (OIP), Magma’s product suite provides users with new 28-nanometer (nm) design methodology features to address the challenges of low power, performance and design for manufacturability (DFM).Read More → "Magma’s Talus IC Implementation System Supports TSMC 28-nm Process Technology Through Reference Flow 11.0"

Synopsys delivers comprehensive custom design solution for TSMC Analog/Mixed-Signal Reference Flow 1.0

MOUNTAIN VIEW, Calif., June 9, 2010— Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with TSMC to validate Synopsys’ custom design solution with TSMC’s 28-nanometer (nm) interoperable process design kit (iPDK) and Analog/Mixed-Signal (AMS) Reference Flow 1.0. TSMC’s 28nm reference phase-locked loop (PLL) design was used to validate Synopsys’ comprehensive custom solution while demonstrating productivity-enhancing capabilities of the TSMC AMS Reference Flow 1.0. The validated solution from Synopsys includes the Galaxy Custom Designer® implementation, HSPICE® circuit … Read More → "Synopsys delivers comprehensive custom design solution for TSMC Analog/Mixed-Signal Reference Flow 1.0"

VIA EITX-3001 Shows that ‘Thin is In’ for Embedded Devices

Taipei, Taiwan, June 9, 2010 – VIA Technologies, Inc, a leading innovator of power efficient x86 processor platforms, today announced the VIA EITX-3001, its latest Em-ITX form factor board and the ideal solution for a range of durable and fanless next generation devices in kiosk, HMI, POI and POS embedded applications.

Combining the latest … Read More → "VIA EITX-3001 Shows that ‘Thin is In’ for Embedded Devices"

Synopsys delivers comprehensive design enablement for TSMC 28-nm process technology with Reference Flow 11.0

MOUNTAIN VIEW, Calif., June 09, 2010— Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it is delivering comprehensive design enablement for TSMC’s 28 nanometer (nm) process technology with TSMC Reference Flow 11.0. New features of the flow include solutions for system-level design and verification, added capabilities for 28-nm design, including In-Design physical verification, and support for thru-silicon via (TSV) technology for 3D IC design. Through Reference Flow 11.0, Synopsys tools and IP enable enhanced productivity, lower power, higher yield and increased performance and integration.

“TSMC and … Read More → "Synopsys delivers comprehensive design enablement for TSMC 28-nm process technology with Reference Flow 11.0"

80V DC/DC Converter Makes Positive or Negative Regulated Voltages

MILPITAS, CA – June 9, 2010 – Linear Technology Corporation announces the LT3958, a high input voltage DC/DC converter for boost, flyback, SEPIC and inverting power supply applications. This device operates over an input voltage range from 5V to 80V, has an onboard 84V/3.5A power switch, and can achieve efficiencies up to 96%, making it well suited for industrial, automotive, medical and telecom applications.

The LT3958 is capable of generating either a positive or negative regulated output voltage with its two voltage feedback error amplifiers and reference voltages. One set is … Read More → "80V DC/DC Converter Makes Positive or Negative Regulated Voltages"

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