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Curtiss-Wright Controls Debuts its First VPX Single-Slot Physical Layer Switch

DAYTON, OH – September 1, 2010 — Curtiss-Wright Controls Electronic Systems (CWCEL), a business group of Curtiss-Wright Controls, and the originator of the Physical Layer Switch (PLS), has announced the availability of its new VPX2500. This VPX-based managed, non-blocking, multi-protocol Layer 1 PLS is packaged in a 6U VPX (VITA 46) form factor. The VPX2500 is able to connect any serial digital signal input to any single output at speeds up to 2.5Gbps. Its flexible, expandable crossbar switch performance enables users to control their … Read More → "Curtiss-Wright Controls Debuts its First VPX Single-Slot Physical Layer Switch"

ITTIA DB SQL Delivers Advanced Sharing and Transactions for Embedded Data

August 31, 2010 — Bellevue, WA — ITTIA, a global supplier of embedded database software, today unveiled the version 3.2 release of its leading edge relational database, ITTIA DB SQL, for application developers of embedded systems and devices. This release introduces transaction savepoints and two new ways to share data on a device, with support for shared memory communications and a low-overhead storage-level locking model.

Read More → "ITTIA DB SQL Delivers Advanced Sharing and Transactions for Embedded Data"

Tiny Low Frequency Clock Chip Supports Long Duration Timing from 1ms to 9.5hrs

MILPITAS, CA – September 1, 2010 – Linear Technology announces the LTC6991, a simple, accurate low frequency clock specifically designed for long duration timing applications. The LTC6991 is the latest part in the TimerBloxTM family of versatile silicon timing devices, in which an accurate programmable oscillator is combined with precision circuitry and logic. An extremely wide programmable frequency range allows the clock to operate with a period from 1ms to 9.5 hours. This makes the LTC6991 useful for intervalometers, watchdog timers and periodic wake-up timers with minimal components and effort.

The LTC6991 is simply programmed, … Read More → "Tiny Low Frequency Clock Chip Supports Long Duration Timing from 1ms to 9.5hrs"

Tiny Low Frequency Clock Chip Supports Long Duration Timing from 1ms to 9.5hrs

MILPITAS, CA – September 1, 2010 – Linear Technology announces the LTC6991, a simple, accurate low frequency clock specifically designed for long duration timing applications. The LTC6991 is the latest part in the TimerBloxTM family of versatile silicon timing devices, in which an accurate programmable oscillator is combined with precision circuitry and logic. An extremely wide programmable frequency range allows the clock to operate with a period from 1ms to 9.5 hours. This makes the LTC6991 useful for intervalometers, watchdog timers and periodic wake-up timers with minimal components and effort.

The LTC6991 is simply programmed, … Read More → "Tiny Low Frequency Clock Chip Supports Long Duration Timing from 1ms to 9.5hrs"

C-to-FPGA Integration Accelerates Prototyping 10X

Bel Air, MD, 31 August 2010. Stone Ridge Technology today announced integration to the popular Impulse C to FPGA toolset. The integration enables software developers to write HLL (high level language) algorithms that rapidly compile to optimized RTL (run time language) targeting Stone Ridge’s RDX-11 FPGA board and development kit. For designs with significant non-sequential logic the speed improvements can be 10 – 100x. Compared to hand coded RTL methodologies, the design entry can take two thirds the time and iterations one eighth the time.

According to recent research, up to 1/3 of design … Read More → "C-to-FPGA Integration Accelerates Prototyping 10X"

C-to-FPGA Integration Accelerates Prototyping 10X

Bel Air, MD, 31 August 2010. Stone Ridge Technology today announced integration to the popular Impulse C to FPGA toolset. The integration enables software developers to write HLL (high level language) algorithms that rapidly compile to optimized RTL (run time language) targeting Stone Ridge’s RDX-11 FPGA board and development kit. For designs with significant non-sequential logic the speed improvements can be 10 – 100x. Compared to hand coded RTL methodologies, the design entry can take two thirds the time and iterations one eighth the time.

According to recent research, up to 1/3 of design … Read More → "C-to-FPGA Integration Accelerates Prototyping 10X"

Magma Delivers Hierarchical Reference Flow for the Common Platform alliance’s 32/28-nm Low-Power Process Technology

SAN JOSE, Calif., Aug. 31, 2010 — Magma® Design Automation (Nasdaq: LAVA), today announced the availability of a proven hierarchical RTL-to-GDSII reference flow for the Common Platform™ alliance’s 32/28nm low-power process technology. This automated, comprehensive solution provides predictable results and reduces development costs for 2-million-instance and larger systems on chip (SoCs) that are manufactured at this advanced process node. 

Read More → "Magma Delivers Hierarchical Reference Flow for the Common Platform alliance’s 32/28-nm Low-Power Process Technology"

Curtiss-Wright Controls Introduces Dual Mezzanine Card Subsystem

SAN DIEGO, CA – August 31, 2010 — Curtiss-Wright Controls Embedded Computing (CWCEC), a business group of Curtiss-Wright Controls and a leading designer and manufacturer of commercial off-the-shelf (COTS) VME, VPX, VXS and CompactPCI products for the rugged deployed defense and aerospace market, has introduced a new rugged, compact dual mezzanine card subsystem that enables the expansion of system functionality while minimizing space, weight and power (SWaP) burdens. The new MPMC-9020 features a built-in controller card and power supply and can be configured with one (1) or two (2) PMC or XMC mezzanine cards. … Read More → "Curtiss-Wright Controls Introduces Dual Mezzanine Card Subsystem"

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