MILPITAS, CA – October 13, 2010 – Linear Technology introduces the LTM9004 and LTM9005, two breakthrough RF-to-digital µModule® receivers that integrate the key components for 3G and 4 … Read More → "RF-to-Digital µModule Receivers Reduce Size, Cost & Time-to-Market for Base Station Designs"
MOUNTAIN VIEW, Calif., Oct. 13 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that GSI Technology, a leader in high-density, high-speed monolithic SRAMs, has selected Synopsys’ CustomSim™ FastSPICE solution for the development and verification of its leading-edge designs. GSI Technology’s 144-megabit (Mbit) SigmaQuad SRAMs achieve data bandwidths in excess of 72 gigabits per second (Gbps). In order to maximize yield with such aggressive timing specifications, extensive full-chip transistor-level simulations need to be run over multiple process, voltage and temperature corners. CustomSim delivered confirmed silicon-accurate results while simulating … Read More → "Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation"
We can’t believe it’s been seven years.
We started FPGA Journal in the wildest days of the emergence of programmable logic. The technology had been around for over a decade, but the drama had just begun. FPGAs had finally outgrown the “glue logic” label and were rapidly becoming effective platforms for system integration. ASIC gates in a socket – counting NRE, unit cost, tools, design time, risk, and engineering resources – had stopped getting cheaper, and for many applications they were getting more expensive. FPGA … Read More → "Seven and Counting"
MOUNTAIN VIEW, Calif., Oct. 12 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its award-winning Galaxy™ Implementation Platform product, IC Validator, for In-Design physical verification within IC Compiler, has been successfully used for more than 100 tapeouts at advanced process nodes. Coming so soon after IC Validator’s 2009 launch, this milestone is a strong indicator of the requirement for a different physical verification use model. In contrast to the traditional stand-alone physical verification approach performed at the end of the design cycle, the new In-Design approach is … Read More → "100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys’ In-Design Physical Verification"
HILLSBORO, OR – OCTOBER 12, 2010 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced its third-generation mixed-signal devices, the Platform Manager™ family. The programmable Platform Manager devices are expected to simplify board management design significantly by integrating programmable analog and logic to support many common functions, such as power management, digital housekeeping and glue logic. By integrating these support functions, Platform Manager devices can not only reduce the cost of these functions compared to traditional approaches, but also can improve system reliability and provide a high degree … Read More → "New Lattice “Platform Manager” Transforms Board Power And Digital Management"
SAN JOSE, Calif., Oct. 12 /PRNewswire/ — To accelerate the integration of programmable logic and processors in embedded systems, Altera Corporation (Nasdaq: ALTR) today announced its Embedded Initiative. With this initiative, Altera is providing designers a single FPGA design flow based on its Quartus® II development software—including the new Qsys system-level integration tool, a common FPGA intellectual property (IP) library, and new ARM® Cortex™-A9 … Read More → "Altera Launches Embedded Initiative with New System Level Integration Tool for Embedded Systems Configurability"
MONTREAL, Oct. 12 /PRNewswire/ — Opal-RT Technologies (www.opal-rt.com), the leading developer of open Real-Time Simulators and HIL testing systems for electrical, mechanical and fast-switching power electronic systems, today introduced new additions to the company’s OP5000 family of FPGA-based I/O and signal conditioning hardware.
These new products include:
HILLSBORO, OR – OCTOBER 12, 2010 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of Service Pack 1 for Version 8.1 of its ispLEVER®FPGA design tool suite. Service Pack 1 is an important update for designers targeting mid-range LatticeECP3™ devices using the ispLEVER tool suite.
Updated Support for the LatticeECP3 FPGA Family
Service Pack 1 updates the device values to production characterized … Read More → "Lattice Announces Update To ispLever FPGA Design Tool Suite"
MILPITAS, CA – October 12, 2010 – Linear Technology introduces the LTC6409, a fully differential amplifier capable of driving DC to 100MHz signals with just 1.1nV/√Hz noise and -88dBc HD2/HD3 distortion. Built on an advanced SiGe BiCMOS process, the LTC6409 features 10GHz gain-bandwidth product, 100dB SFDR up to 40MHz, and 1% settling time of 1.9ns. It is ideal for driving the latest high speed … Read More → "Differential Amplifier Drives DC-Coupled, Ground-Referenced 100MHz Signals with Low Noise & Low Distortion"
MILPITAS, CA – October 11, 2010 – Linear Technology Corporation introduces the LTC2911 three-channel supply monitor with power-fail warning for low voltage systems down to 0.5V. In certain applications, monitoring the main input supply is just as important as monitoring the intermediate bus voltages in order to provide the host an early warning of supply failure and signal shutdown procedures. The LTC2911 offers a power-fail input and output to support this function, in addition to three voltage inputs, with 1.5% threshold accuracy over the entire operating temperature range.
The … Read More → "Precision Triple Supply Supervisor Provides Early Power-Fail Detection"
