Empowering the Virtual Cluster
March 20, 2011
In this video, Nick Difiore explains how the capabilities of Xilinx FPGAs allow a switch from mechanical to electronic displays.
… Read More → "Empowering the Virtual Cluster"Hierarchical Design Using Synopsys and Xilinx FPGAs
March 20, 2011
Complex design issues can be addressed using block-based flows where working blocks can be preserved at the netlist level, and optionally at the placement or even the routing level. Unchanged blocks are automatically preserved during synthesis and implementation.
The main benefit of this flow is to reduce the number of implementation iterations … Read More → "Hierarchical Design Using Synopsys and Xilinx FPGAs"
Scaling Up to TeraFLOPs Performance with the Virtex-7 Family and High-Level Synthesis
March 20, 2011
This white paper provides an overview of fixed- and floating-point DSP coding techniques, ranging from RTL to the Xilinx portfolio of IP and tools. It also describes advances with High-Level Synthesis (HLS) tools, like AutoPilot, how FPGA designs can benefit from coding in a “natural language” like C or C++, and how easily FPGAs can be programmed by a large community of software programmers.
Authors: Oliver Garreau and Jack Lo, Xilinx
</ … Read More → "Scaling Up to TeraFLOPs Performance with the Virtex-7 Family and High-Level Synthesis"Lowering Power at 28nm with Xilinx 7 Series FPGAs
March 20, 2011
This whitepaper describes several aspects of power related to the Xilinx® 28nm 7 series FPGAs, including the TSMC 28nm high-k metal gate (HKMG), high performance, low power (28nm HPLor 28 HPL) process choice.
The power benefits afforded by the 28 HPL process and its usefulness across Xilinx’s full … Read More → "Lowering Power at 28nm with Xilinx 7 Series FPGAs"
Parameterizable Content-Addressable Memory
March 20, 2011
This application note describes a parameterizable content-addressable memory (CAM), and is accompanied by a reference design that replaces the CAM core previously delivered through the CORE Generator™ software. The CAM reference design should be used for all new FPGA designs targeting Virtex®-6, Virtex-5, Virtex-4, Spartan®-6, Spartan-3, Spartan-3E, Spartan-3A, Spartan-3A DSP FPGAs, and newer architectures. All the features and interfaces included in the reference design are backward compatible with the LogiCORE™ IP CAM v6.1 … Read More → "Parameterizable Content-Addressable Memory"
Video Surveillance
March 19, 2011
In this video, Xilinx senior product line manager Joe Mallett shows how a mix of software and dedicated hardware in the Spartan allows an HD signal to be processed in real time, utilizing both VGA and QVGA formats.
… Read More → "Video Surveillance"Xilinx Baseband Pre-Distortion
March 19, 2011
David Hawke (Sr. Product Manager, Radio & Interfaces) describes how Xilinx worked with Axis in the development of a “remote radio head” platform that implements digital pre-distortion techniques.
… Read More → "Xilinx Baseband Pre-Distortion"
3D ICs
March 17, 2011
It wasn’t very long ago that managing off-chip interconnect was a no-brainer. The interconnect path was very straightforward. It started at a pad on the chip, went out through a bond wire then connected to a metal lead, which connected to the PCB. The number of “interfaces” was small; a total of 4 counting the pad on the chip, the bond wire, the metal lead and the PCB, as illustrated in Figure 1.
Read More → "3D ICs"
Fair Trading
March 16, 2011
Until the coming of the railway, many European towns, in addition to their regular market, would have an annual fair. These were important events, with merchants travelling long distances to sell exotic goods. The privilege of holding a fair was jealously guarded, and the license or charter was given or withheld by a ruler. In my home town, Winchester, the Bishop had the license for the fair and charged the traders rent. To ensure that they got value for their money, the Bishop closed all the normal shops in the town for the duration of the fair. In … Read More → "Fair Trading"
Zynq-7000 Extensible Processing Platform Overview
March 16, 2011
Vidya Rajagopalan, VP of Processing Platforms at Xilinx, and Dipesh Patel, VP of Technology, Physical IP Division at ARM, introduce the Zynq-7000 Extensible Processing Platform from Xilinx. This new class of product combines an industry-standard ARM® dual-core Cortex™-A9 MPCore™ processing system with Xilinx unified 28nm architecture.
… Read More → "Zynq-7000 Extensible Processing Platform Overview"
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