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Matters of Integrity

Busting PCB Design Myths

They say that practice makes permanent – whether it’s right or wrong. And, for those of us who have been designing printed circuit boards (PCBs) for years or even decades, the adage rings true. Many of our habits and beliefs are born of career-long repetition and reinforcement without benefit of a close critical examination. After all, we’ve designed board after board, and they almost always work correctly, so what’s the point in stepping back and challenging our well-worn norms?

Well, if you haven’t noticed, PCB design has been changing rapidly these days. Clock frequencies are up. Trace and pin spacings are down. Layer counts are increasing. Components are becoming more complex. The list goes on and on. Luckily, our management teams have universally recognized these challenges and have made reasonable allowances for longer design schedules with more re-spins. Right? Wait, what? Your management hasn’t done that? Better read on, then. 

When design process degenerates into dogma, we put ourselves in peril. Let’s take a few minutes, then, to review some basics of board physics that may serve as helpful reminders for your next design project. At Altium’s recent AltiumLive event, we had the benefit of several excellent presentations on PCB design, and there was a fountain of useful information on power and signal integrity as well as EMI reduction. In particular, excellent talks by Eric Bogatin and Rick Hartley worked to shred common myths and poor practices by PCB designers. Our takeaways made us rethink a number of our own quietly held beliefs about board layout.

Eric Bogatin, in his presentation “The Value of White Space” pointed out that – if your solderless breadboard prototype works, your PCB will probably also work – no matter how it’s designed. That’s a bit of a relief, but also a sinister trap. In that (rare) situation, you are essentially designing for connectivity, and PCB layout is not critical. You’re assuming that the schematic itself is an adequate description of your circuit, and the interconnects are all ideal (or close enough), with no resistance, capacitance, inductance, or delay.

Ah, ignorance is bliss, ain’t it?

As Bogatin points out, if we assume our connectivity is correct, everything else involved in getting a working layout is about eliminating noise. He breaks noise down into “self aggression noise,” which is noise caused on a signal because of that signal, and “mutual aggression noise,” which is noise caused on a signal because of some other signal (or by the outside world, via EMI). If you’ve been in the “if it connects right it will work” camp above, you’ll note that these problems exist only in the traces and white space of the board, not in the schematic. That means it’s all about your board design.

We all may have a subconscious tendency to think about our PCB, and particularly the “power” and “ground” parts of our PCB, in terms of DC. Deep down, we know it ain’t so, but all those big wide power and ground planes can lull us into a sense of complacency – a happy and naive state of mind where ground doesn’t bounce and return paths make a beeline dutifully and directly back to the power supply. Our schematics don’t help, with ground usually represented by a cute little static symbol (specifically IEC #5017 “Earth ground,” which was probably based on patent drawings by Nicola Tesla, but that’s for another discussion). Know what you won’t see? You won’t see the IEC #5018 “Noiseless ground” symbol (which has a calming little sunrise arc over the usual “ground plates buried in dirt” symbol). That fact should serve as a sobering reminder. 

The reality is, our PCBs may be square and flat like Kansas, but we are definitely not in Kansas anymore. The typical schematic shows us nothing about the return path, and the return path is critically important in good board design. For example, folks tend to quietly assume that a return path will follow a straight line through the ground plane because that’s the “path of least resistance.” But when we shift out of DC-based thinking and swap that “resistance” for “impedance,” we see that, when a signal layer is adjacent to the ground plane, the return path follows generally directly under the signal – unless, of course, we have a break in that ground plane. In that case, our return path takes Mr. Maxwell’s wild ride around that break, creating what we would think of as an “antenna.”

“There are two kinds of PCB designers: those who are designing antennas on purpose, and those who are creating them by accident.”

As Rick Hartley pointed out in his talk “The Extreme Importance of PCB Stack-up,” the energy in an electrical circuit is not in the current or voltage; it is in the electric and magnetic fields. And those fields don’t exist in the traces or in the planes – they exist in the spaces between them. That’s right – the energy in your circuit travels through the dielectric – the fiberglass and plastic, not through the copper. The copper – the traces and planes – merely steer the energy like a wave guide. In fact, Hartley points out, all signal traces on circuit boards, relative to their return paths, form wave guides.

That space between a signal trace and return path is critical in determining the amount of EM energy radiated from your board, and the return path may not be where you think it is. If other signal traces offer lower impedance than the path between your trace and a ground plane, those other signal traces (and not your ground plane) will form the return path, with all the resultant crosstalk and noise that you’d expect. The moral to this story? Know (and pay very careful attention to) your return paths.

Bogatin pointed out that the key to solving signal and power integrity issues is to correctly identify the root cause, and he went on to break down problems into six families: reflection noise (self-aggression noise caused by impedance mismatches), crosstalk noise (mutual-aggression noise caused by fringe EM fields from one path inducing voltages on another), ground bounce (caused usually by failure to properly manage return paths), frequency-dependent losses (found in gigabit-plus signal paths), power path problems such as rail collapse, voltage droop, power supply noise, and EMI (caused, again, by not managing return paths carefully). 

If there was one message that was clear, it was to understand where your return paths actually are, and to keep the proximity of the signal and return as close as possible. With that, inductance is reduced, EMI is reduced, crosstalk is minimized, and a host of other evils are avoided.

There is a variety of excellent resources for boning up on board design basics, and it would behoove even the most experienced PCB designer to periodically go back and review practices. The problems that sneak into board design can be insidious and frustrating, and creating an elegant layout is more of an art than a simple adherence to design rules.

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