Sure, the announcement that Xilinx is now “shipping” their first 16nm FinFET-based super-amazing Zynq UltraScale+ All Programmable MPSoCs is kinda’ a big deal. Zynq UltraScale+ is unquestionably the most capable SoC we’ve ever seen, and it is difficult to even imagine the game-changing applications that will be built with this device.
Just as a refresher, Zynq UltraScale+ is a multi-core heterogeneous computing device that includes quad-core, 64-bit, ARM Cortex-A53s, dual-core Cortex-R5 real-time processors, a Mali-400MP graphics processor, enormous amounts of advanced FPGA fabric, a hardened H.265/264 codec unit, an “Advanced Dynamic Power Management Unit” for ASIC/ASSP-grade application power management, a configuration security unit to help lock down your design, forward-looking DDR4/LPDDR4 memory interface support, and copious amounts of on-chip ultra-high-speed “UltraRAM” for buffering and so forth. Whew! That was a long sentence, but Zynq UltraScale+ is a complicated device.
If you want to know more of our original impressions of Zynq UltraScale+ from when it was first announced, you can read this article.
Xilinx claims that Zynq UltraScale+ delivers “5x system-level performance per watt.” Not quite sure what that really means? Neither are we. Xilinx also claims that Zynq UltraScale+ started “shipping” this week. They say: “Initial Zynq UltraScale+ MPSoC devices are shipping now. General sampling begins in Q1, 2016.” Not quite sure what that means? It means you can’t get one yet.
Let’s move on along.
At almost the same time as they announced shipment of this bone-crushing processing powerhouse, Xilinx popped out a press release entirely on the other end of the spectrum. The new “Arty” development board will never play on the same softball team with Zynq UltraScale+. Arty is based on Artix, Xilinx’s least-expensive line of programmable devices.
Aimed at the entry-level, hobbyist, prototyping crowd, Arty won’t be setting any processing speed records. Its official processor is a soft-core, configurable, MicroBlaze implemented in the Artix FPGA fabric. Arty is a low-cost, high-capability platform that dramatically lowers the barrier to entry for embedded design with FPGAs. By including the processor in the FPGA itself as a soft core, they eliminate the need for a separate CPU/MCU/SoC device. That means the board can be all FPGA and interfaces, leading to lower cost and increased flexibility.
Arty is equipped with an Arduino/ChipKit “shield” connector, and four Pmod interfaces – which should serve to clearly establish the target audience. Arty is not an Arduino board per-se (you’ll be doing your design in Xilinx’s Vivado Design Suite, actually), but it connects smoothly to your Arduino universe using the above connectors and interfaces. Those facts, along with the double-digit price tag, should be enough to clearly establish the audience and purpose of this kit.
Arty includes a Xilinx Artix-7 XC7A35T-L1CSG324l FPGA (which, for those of you who don’t speak fluent FPGA part number code, is a low-cost FPGA with 33,280 logic cells, 1.8Mb of block RAM, 90 DSP slices, 4 multi-gigabit (up to 6.6Gb/s) SerDes transceivers, a PCI Express block, and 250 user IO pins. Artix also has an on-chip analog-to-digital converter (XADC), which enables a lot of real-world interfacing.
So, if you have any preconceived notion of what a “low-cost” FPGA is – go back and re-read the specs in that last paragraph one more time. You may notice that they are comparable with the super-expensive high-end FPGAs from just a few years ago. Yeah. This is not even your older brother’s low-cost FPGA. Welcome to the future.
Also on the board is 256 MB of 667 MHz DDR3L with a 16-bit bus, 16 MB Quad-SPI Flash (which can be used to store the FPGA configuration as well), 10/100 Ethernet, and a USB-UART bridge. And, of course, what development/experiment kit would be complete without a bunch of switches, buttons, and RGB LEDs?
Did you notice that we didn’t mention a processor?
That’s because the processing duties are handled by Xilinx’s well-proven MicroBlaze soft-core configurable processor – implemented in the fabric of the FPGA itself. MicroBlaze will occupy only a small fraction of the FPGA, however, so you’ll have plenty of room left for all kinds of programmable hardware magic – from additional interfaces and peripherals to specialized accelerators.
All of that should give the advanced hobbyist/experimenter a pretty awesome playground for doing some sophisticated stuff. For people whose design ambitions have outgrown the typical Arduino kit, Arty is a great intro into the big leagues.
Of course, to play in the big leagues you have to use big-league design software. That’s one of the coolest side benefits of Arty, you get a full seat of Vivado Design Suite: Design Edition. Included. There’s fine print, of course. It’s node-locked and device-locked, so it can be used only on your machine and only to design with the Artix-7 XC7A35T.
The Vivado bonus brings up an additional use case: people who want to try out Vivado without paying the “bigger bucks” for a full-blown copy. If you’ve been using ISE, and you’ve dragged your feet jumping into the Vivado pool, you can spring for an Arty kit and you’ll have yourself a nice little environment where you can learn Vivado while you make some cool projects. And, to get you started, Arty comes with a reference design that implements FreeRTOS Webserver running on the MicroBlaze. See? You’ll probably have something working the first day.
Arty is a joint project of Xilinx, Avnet, and Digilent. Avnet is even offering a “SpeedWay Design Workshop” featuring Arty, so you can pick up a dev kit and get some great hands-on training at the same time.
With the incredible capability of today’s low-cost FPGAs, there is a huge range of applications that can be enabled with low-cost devices, so it’s interesting to see Xilinx taking a stronger interest in the low-cost market. Most of their press in recent times has been aimed at the upper- and mid-range FPGA space. Perhaps, if Arty turns out to be a success, we’ll see more action in the realm of cheaper, more approachable FPGAs.