feature article
Subscribe Now

It’s Raining MCUs Over Texas

TI’s ’C129 Chips Connect GUI to the Cloud

Texans know clouds. Whether he’s a rancher or a farmer, your basic Texas agriculturalist makes his living looking at the sky and knowing which way the wind blows. And in Texas, it blows a lot. (Trivia: You can tell a rancher from a farmer by his hat. Ranchers wear cowboy hats; farmers wear ball caps.)

And that ol’ Texas wind is blowing clouds right up into Dallas, home of Texas Instruments. The clouds have blown through the marketing department and straight into engineering. And after stirring up a little dust, out blows a new MCU family.

Say hello to the TM4C129x, a new chip family that sounds like it was named by a North Korean military committee instead of a bunch of Texans. The new livestock from the Big D is aimed at cloud-connected hardware. The phrase “Internet of Things” never came up during my conversation with TI (thanks, guys!), but that’s clearly where these chips are headed. 

So what’s a TM4C129x? It’s a smallish, cheapish, 32-bit microcontroller intended for industrial applications that need two things: a graphical user interface and a network connection.

Need uniqueness? We’ve got uniqueness. The ’C129x is the only MCU family to combine an Ethernet MAC and PHY with an ARM Cortex-M4 processor core. How’s that for differentiation? Ethernet MACs are common enough. It’s the PHY that makes it fun, because you don’t have to add the outboard magnetics that most Ethernet connections need. Just wire up an RJ45 jack and git ’er done.

Although there are a few other MCUs with Ethernet MAC and PHY, TI is careful to point out that theirs is the only one based on the ARM Cortex-M4. It’s a bit of a fine distinction, but a distinction nonetheless.

At the other end of the chip, you’ll find an LCD controller, which is what makes the ’C129x your basic all-in-one, network-enabled GUI chip. Ethernet on one side, LCD display on the other. Cortex-M4 and a bunch of memory in the middle. The LCD controller is just that: a controller, not a graphics engine. It’ll handle character-based and OLED displays, but don’t expect fireworks. About right for an industrial user interface, not so much for games. 

At 120 MHz top speed, the ’C129x ain’t the fastest steer in the herd. But it does have floating-point capability, which can make short work of single-precision numbers, even if it is just moseying along. The chip’s also got a lot of memory: 1 MB of flash and up to 256 KB of SRAM. That’s a lot of on-chip SRAM for such a lightweight part, the idea being that it’s also your display’s frame buffer. Unless you go for a big, high-resolution display, you won’t have to use off-chip RAM for a buffer. Nice.

It wouldn’t be much of an industrial controller without lots of I/O, so the ’C129x has, well, lots of I/O. We got your usual acronyms, such as USB, UARTs, I2C, SPI, ULPI, CAN, RTC, ADC, PWM, and lots of general-purpose I/O pins. Not so common is the crypto unit. Here we have more acronyms: AES, DES, SHA, and MD5 all get hardware acceleration, as does CRC generation. It’s not a full crypto engine by any means, but a useful and valuable addition to a low-cost MCU that can help you tamper-proof your application and its contents.

TI announced the ’C129x family uncharacteristically close to its actual production date, so samples are already available, with production slated for early next year. Prices start at “around $6” in quantities, depending on your choice of RAM size and package type. If you want a head start, TI’s development kit (board plus software) is just $199.

TI is one of the few companies making chips in all three ARM series: A, R, and M. Of course, TI was an early backer of ARM, back when the British firm was just a little acorn recently fallen from the tree. The two firms have gotten along famously ever since, to the mutual benefit of both. That long alliance has allowed TI to build up quite a bit of software and development infrastructure, so tenderfoot ARM users can be confident they will be in good, if rough, hands. 

One thought on “It’s Raining MCUs Over Texas”

  1. The built-in ethernet PHY is the PHY, not the magnetics as well. External magnetics are required, either standalone or built into the RJ-45 jack. This is not to say that having a built-in PHY isn’t marvelous and is why I have been waiting nearly a year for these chips to start a new design, since TI suddenly “NRND”-ed their entire line of M3 parts on December 1 2012, including the only ethernet mac+phy M3 chips in existence.

Leave a Reply

featured blogs
May 7, 2021
In one of our Knowledge Booster Blogs a few months ago we introduced you to some tips and tricks for the optimal use of Virtuoso ADE Product Suite with our analog IC design videos . W e hope you... [[ Click on the title to access the full blog on the Cadence Community site. ...
May 7, 2021
Enough of the letter “P” already. Message recieved. In any case, modeling and simulating next-gen 224 Gbps signal channels poses many challenges. Design engineers must optimize the entire signal path, not just a specific component. The signal path includes transce...
May 6, 2021
Learn how correct-by-construction coding enables a more productive chip design process, as new code review tools address bugs early in the design process. The post Find Bugs Earlier Via On-the-Fly Code Checking for Productive Chip Design and Verification appeared first on Fr...
May 4, 2021
What a difference a year can make! Oh, we're not referring to that virus that… The post Realize Live + U2U: Side by Side appeared first on Design with Calibre....

featured video

The Verification World We Know is About to be Revolutionized

Sponsored by Cadence Design Systems

Designs and software are growing in complexity. With verification, you need the right tool at the right time. Cadence® Palladium® Z2 emulation and Protium™ X2 prototyping dynamic duo address challenges of advanced applications from mobile to consumer and hyperscale computing. With a seamlessly integrated flow, unified debug, common interfaces, and testbench content across the systems, the dynamic duo offers rapid design migration and testing from emulation to prototyping. See them in action.

Click here for more information

featured paper

Optimizing an OpenCL AI Kernel for the data center using Silexica’s SLX FPGA

Sponsored by Silexica

AI applications are increasingly contributing to FPGAs being used as co-processors in data centers. Silexica's newest application note shows how SLX FPGA accelerates an AI-related face detection design example, leveraging the bottom-up flow of Xilinx’s Vitis 2020.2 and Alveo U280 accelerator card.

Click to read

Featured Chalk Talk

Electronic Fuses (eFuses)

Sponsored by Mouser Electronics and ON Semiconductor

Today’s advanced designs demand advanced circuit protection. The days of replacing old-school fuses are long gone, and we need solutions that provide more robust protection and improved failure modes. In this episode of Chalk Talk, Amelia Dalton chats with Pramit Nandy of ON Semiconductor about the latest advances in electronic fuses, and how they can protect against overcurrent, thermal, and overvoltage.

More information about ON Semiconductor Electronic Fuses