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Xilinx Zynq Zigs, Zags, and Zooms

Crank up Richard Strauss’ Also Sprach Zarathustra. Cue monkeys dancing around the black obelisk. Throw a bone in the air and shout at the sky.

It’s the dawn of a new age in embedded engineering.

Xilinx is getting into the ASIC and microprocessor businesses in a big way, and something tells me they’re not the only ones. The company’s newest chips combine high-end ARM processors, fixed peripherals, and gobs of programmable logic into an all-in-one device that might make ASIC designers think twice about their next big project. For as little as $15, it could take the place of a custom-designed SoC, but without the million-dollar development effort.

In an apparent move to avoid vowels and maximize its Scrabble core, Xilinx calls the new chips Zynq. (All the good names were taken, apparently.) Zynq, unlike its namesake metal, is an “alloy” of two elements. In this case, it combines an ARM microprocessor with a Xilinx FPGA. The combination has unique properties, just like a chemical compound. Just don’t call it a fusion: that name has already been used by Actel for its own line of FPGA-with-CPU chips.

Like 2001: A Space Odyssey (or Arthur C. Clarke’s original short story, The Sentinel), the fruits of this evolution may be a long time coming. The first Zynq devices won’t be available for almost a year. A cynical mind might suspect Xilinx of stealing a march on arch-rival Altera, which could, maybe, possibly, hypothetically introduce a similar product line very soon.

So what is Zynq? It’s simultaneously groundbreaking and boring. It combines familiar ingredients we already know into a single chip. It’s a big FPGA with a dual-core ARM Cortex-A9 inside… or a dual-core ARM Cortex-A9 with a big FPGA around it. You decide. Either way, Xilinx is pitching Zynq as a programmable system-on-chip; an alternative to an ASIC or SoC that doesn’t require exotic EDA tools and hyper-expensive production. It’s an SoC for the rest of us.

It’s the same concept as Actel’s SmartFusion, which we revealed precisely one year ago (see “Actel’s Three-Legged Stool,” Electronic Engineering Journal, March 2, 2010). Zynq is a bigger and badder version of that concept with a much faster processor and lots more FPGA resources. Zynq doesn’t have SmartFusion’s analog features, though, so it’s only a two-legged stool.

There will be four chips in the Zynq family. All four have exactly the same dual-core ARM Cortex-A9 CPUs with floating-point, Neon, and Jazelle. L1 and L2 caches are built-in, and the CPUs each run at 800 MHz.

Outside the CPUs, all four chips come with dual USB, dual Gigabit Ethernet, dual CAN, dual 12-bit analog/digital converters, eight DMA channels, a DRAM controller, and lots of fiddly little serial I/O interfaces. Two of the four chips come with PCI Express as well.

Apart from the PCI Express interface, the biggest difference among the Zynq quadruplets is the amount of FPGA logic you get. Counting FPGA gates is always tricky, but Xilinx says the low-end Zynq-7010 has 28,000 logic cells (equivalent to 430,000 ASIC gates, the company says) up to a maximum of 235,000 logic cells (3.5 million ASIC gates) on the biggest Zynq-7040.

That’s a lot of soft logic to play with, and it’s all connected to the dual CPUs. So instead of just stuffing the FPGA with random system logic, you can devise your own peripheral controllers and make them almost part of the CPU. If you remember Triscend, a company that Xilinx acquired in 2004, you’ll be familiar with the concept. The core processor (or, um, processor cores in this case) and some of the peripherals are fixed forever, but you can add additional peripherals to the FPGA fabric. The result is your own DIY system-on-chip, with whatever peripherals and random logic you want. The CPU subsystem never changes, which is good for software portability, but the outlying hardware can be anything you like.

One of the “enabling technologies” (to use a marketing phrase) behind Zynq is its reliance on 28nm silicon fabrication. For comparison, that’s better technology than Intel’s new Sandy Bridge (Core i7) chip is using. FPGA makers normally lag a few generations behind the state of the art in semiconductor technology, partly because the new processes are horribly expensive but also because most FPGAs don’t really need high-end silicon. Xilinx leapt ahead to 28nm because it allowed the CPUs to run at 800 MHz while also packing about a zillion FPGA gates into the same device. Sweet.

So how do you develop software and hardware for this thing? Pretty much the same as you do now. Zynq is compatible with run-of-the-mill ARM programming tools and the programmable logic uses Xilinx’s (or other vendors’) normal FPGA tools. ARM operating systems run on Zynq, with the usual caveat that I/O-specific features would need to be ported first. There’s nothing inside Zynq that hasn’t been seen before. It’s just the combination that’s unique.

Xilinx’s official propaganda places a curious emphasis on “automotive driver assistance” as a potential application area, and Zynq’s inclusion of dual CAN interfaces suggests that these chips have already been designed-in to some car dashboards. The next time you nod off at the wheel of your Mercedes S-class, you can thank Xilinx for keeping you alive.

On the marketing front, we can argue over the Zynq name, but I think it’s good that Xilinx chose not to name the new chips Virtex. Even though the FPGA portion of each chip is lifted directly from Virtex-7, the new Zynq brand name emphasizes the fact that these are not just FPGAs with some added features. Naming them something like “Virtex-7 Plus” would undersell the benefits. First-time Xilinx customers would be confused about how these new chips fit into the whole panoply of Xilinx parts. This way, there’s no question that Zynq chips are different from Virtex, Artix, and Kintex chips. (Now, about those other names…)

FPGA makers have been predicting the demise of the ASIC for a long time, for obvious reasons. They have a vested interest in making that happen, but in spite of their understandable bias, I tend to agree with them. ASIC development is so expensive, so time-consuming, and so risky that any credible alternative is worth a long, hard look. When FPGAs lagged behind other chips in silicon technology, they were only poor substitutes. But once Xilinx starts building Zynq in fast, low-power 28nm silicon, there won’t be any more excuses. The dual Cortex-A9s are peppy enough for plenty of embedded applications, and the million ASIC gates (or whatever) is a big enough sandbox for most designers. As long as Xilinx can keep Zynq production on schedule and keep prices under $100 in volume, I think we’ll see a lot of ASIC engineers hang up their EDA licenses and get galvanized with Zynq. 

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