You start off looking for something, and an hour later you have found lots of interesting things but not necessarily the one you wanted. Libraries are great for this, but the web is even better. What brought on this introspection is that I was trying to find something said by Steve Squyres, the lead scientist on the Mars Rover project. When he explains why Spirit and Opportunity have done so much better than the ninety days that was originally planned, he has a phrase about testing. While I couldn’t find it, and neither could I find a copy of his book, which is somewhere in this house, I did find another relevant quotation, “One test result is worth a thousand expert opinions”. In digging through the web, I found that this has been attributed to a range of people, but most authoritatively to Wernher von Braun, the rocket scientist. (Another of his quotes is “I aim for the stars, but sometimes I hit London.”)
The reason for seeking the quotation was that I have been learning more about testing completed silicon. In a nutshell, it is expensive and difficult. And if you are testing mixed signal devices, it is even more expensive and even more difficult.
The issue arises because analog is increasingly finding its way in to the ASIC/SoCs. These are powering the portable consumer equipment and a raft of other network-aware devices that are increasingly being churned out. Instead of being stowed away in its own domain, designed by specialists working without the benefit of the integrated tool chains for digital, and with chips that are manufactured and tested separately, analog now has to be considered as contributing to the mainstream.
Even for pure digital devices, testing is a bottleneck: vast units, each costing the equivalent of the gross national product of a small country, have to explore every possible corner of the multi-million-transistor structure. And they have to do it for millions of devices. Saving even fractions of seconds when testing a device translates into saving millions of dollars of manufacturing costs.
When you introduce analog/mixed signal (AMS – but, for simplicity, I am just going to use the word analog) into a previously digital device, then you are faced with a dilemma. How do you test the analog section? Testing for wave forms is not the same as testing for noughts and ones. One solution is to add analog testers to the test routine, but this is both expensive and time consuming.
An Edinburgh (Scotland) company, ATEEDA, has come up with two solutions to the problem. The first is a general-purpose approach, called OptimATE. This creates digital test vectors, which run on digital test equipment to exercise the analog circuits on mixed signal devices. ATEEDA claims that this approach has the potential to increase test execution by two orders of magnitude and improve yields through reduced wastage. ATEEDA calculate that within the production costs for mixed signal devices, testing alone is costing in excess of $5 billion, so the potential annual savings can be measured in millions of dollars for typical mixed-signal devices.
OptimATE integrates with existing design flows and test tool flows, but ATEEDA does not claim that this generic solution is easy to use. Whilst it is used by manufacturing companies, it requires an investment in time and effort by both the design team and the test team.
Alongside OptimATE, ATEEDA has been developing a smaller, more focused, and easier to use product to achieve greater acceptance. Research among the mixed-signal design community has identified the most commonly used analog applications convertors. Functions like ADCs (analog to digital conversion) DACs (digital to analog conversion) and SerDes (serialiser/deserialiser) are the main channels for moving between the analog and digital worlds. A tool that would provide a quick route to test these should meet a large number of immediate needs.
The approach that found most favour among the design community was BIST (Built In Self Test). With BIST, extra circuitry on the chip is used to run tests on the target sub-circuits, triggered by and reporting back through some form of communication bus (SPI, I2C or JTAG) or storing the results on RAM. Based on the results from this research, ATEEDA has been developing LinBIST.
The first release of LinBIST is focused on ADCs. It treats the ADC essentially as a black box. The designer uses a GUI to define acceptable parameters for the circuit under test. On the set-up screen, there are choices for the analog input (voltage range, input impedance, and pad leakage), static characteristics (resolution in bits, differentiated and integral non-linearity, offset error, etc), and dynamic characteristics (signal to noise ratio, conversion rate and time, etc.)
The GUI provides radio-button and drop-down menus while a graphic image shows the results of the choice. Having defined the ADC, further screens are used to choose the test routines and select and define the test interfaces (for example the RAM width). Finally, at the magic press of a button, LinBIST generates Verilog (VHDL is under development) for the BIST, both for the analog circuitry for carrying out the tests and for the digital circuitry for controlling the test and interfacing to the outside world. The Verilog can then be dropped into the main tool chain to become part of the overall chip design for synthesis through to manufacture. At device test, the digital tester triggers the BIST activity and reports the result.
ATEEDA has built a development board that can carry the analog target and BIST circuitry in a test chip with the digital circuits in an FPGA for detailed evaluation.
“But,” I hear you cry in unison, or at least in parallel, “this is adding extra circuitry, which will cost silicon, increase processing, and create other similar issues.” Well, there are three parts to ATEEDA’s answer. The first is that the area is very small. The company will not commit in other than general terms as to exactly how small (there are too many variables), but the GUI, as it generates the Verilog, gives an estimate, and the ones I saw were surprisingly low. The second part of the answer is that the cost is insignificant compared to the investment saved by not buying analog test equipment (analog testers are in the region of $10 million each). And, finally, the cost is small compared to the significant time saved in the design cycle and at final test.
LinBIST is still at an early stage. Work is going on to add VHDL and to extend the coverage of LinBIST to DACs, SERDES and PLLs. For other analog applications, there is now an interface from OptimATE to LinBIST, making it easier to develop the test routines for complex analog.
ATEEDA is based in the centre of Edinburgh, within an easy walk of the tourist areas of Princes Street and the Royal Mile, but, more importantly from the company’s view point, within seconds of the investment funds, lawyers, patent attorneys, and the other people who make up Edinburgh’s very vibrant and close-knit financial community. The central band of Scotland was once the site of a number of wafer fabs run by US and Japanese electronics companies. Most of these have closed, but the infrastructure of education, research, and innovation that grew up around the fabs is now creating new companies and initiatives. Edinburgh is not like Silicon Valley in its prime (for a start it rains there almost as much as it does in Portland, Oregon), but it does have the intellectual climate where engineers want to become entrepreneurs and financial people want to invest in their ventures. And the investment is going into companies set up to meet a commercial need rather than to try to find a market for a new technological breakthrough. It is also an ancient city with a strong tradition of education, intellectual achievement, and cultural strength. If you are looking for technology, there are a lot worse places to start.
And to return to our initial search for a quotation. While “one test result is worth a thousand expert opinions” in the case of mixed signal devices, one test result may also be worth not just a thousand but many millions of dollars.