Wirral, UK. 3 February 2010. LDRA, the leading provider of automated software verification tools, and Visure Solutions, market leader in Requirements Definition and Management, have partnered to bring together the first end-to-end application lifecycle management (ALM) system for the embedded space. With the size of complex software applications doubling annually, cost is rapidly increasing, jeopardizing project budgets and creating delivery overruns. By designing an integrated ALM solution, LDRA and Visure hope to deliver 50% cost savings to embedded software development.

The jointly developed application lifecycle management solution will be the first to help companies accomplish embedded software engineering objectives by integrating project management, requirements management, architecture, coding, software configuration management testing and documentation. This ALM tool automates and enforces processes between the stages of development, manage relationships between assets produced by the software development project, and offer transparency and metrics through reports on development as it progresses.

These strengths are aimed at avoiding the consequences outlined in recent news stories which reported that Toyota and Volvo have recalled vehicles due to software failures, while software-intensive projects in aerospace and defense overrun budgets and schedule by a factor of two and deliver only 60% of the expected functionality. Such poor results stem from a number of design challenges that this ALM product is designed to prevent:

• Failure to track requirements through design, analysis and into testing stages, resulting in 85% of all software errors and a lack of transparency and metrics
• Organizational isolation prevents software developers from discussing system integration issues with mechanical or electronic engineers; requirements repositories are separate from most development and verification activities
• Most ALM project tools are geared for IT implementations and fail to support many of the critical objectives of embedded application project

Such failures in process represent a high risk of defective applications being deployed or of significant cost overrun since correction of software defects identified in later lifecycle stages have resulted in a cost multiplier of 900 times!

“Software-driven advances offer the opportunity to meet customer demand for more functionality and improve the quality of products,” noted Baldo Rincón, Managing Director of Visure Solutions. “However, failure to manage requirements through the development process lowers quality and productivity, increasing development costs and time to market. Our strength in Requirements Definition and Management will ensure the updates and changes that are part of any software development lifecycle will automatically be fed into the requirements traceability, analysis and testing-the competencies that LDRA brings to the table.”

“Our customers, particularly in the safety-, mission- and security-critical spaces, daily face the challenge of certifying software that is becoming increasing complex and unwieldy,” noted Bill StClair, LDRA Technical Evangelist. “We hope to provide them with a solution that coherently connects the extensive details inherent in an embedded application with an overall system perspective so that developers and managers alike can collaborate, communicate and work together effectively.”

LDRA and Visure plan to announce their integrated ALM solution in Hall 10, Stand 316 at Embedded World 2010 taking place in Nürnberg, Germany from March 2-4, 2010.

About LDRA

For more than thirty years, LDRA has developed and driven the market for software that automates code analysis and software testing for safety-, mission-, security- and business- critical markets. Working with clients to achieve early error identification and full compliance with industry standards, LDRA traces requirements through static and dynamic analysis to unit testing and verification for a wide variety of hardware and software platforms. Boasting a worldwide presence, LDRA is headquartered in the UK with subsidiaries in the United States and an extensive distributor network. For more information on the LDRA tool suite, please visit: www.ldra.com.

About Visure Solutions

Visure Solutions, “The Requirements Company”, is the market leader in Requirements Definition and Management. Requirements are the most critical element in the development of complex systems and problems derived from their mismanagement have a very high incidence in lowering quality and productivity, increasing development costs and time to market.
With IRQA as our centralized requirements platform, Visure offers specialized and innovative solutions that are easy to use in the implementation of efficient processes for the requirements definition and management, and thereby guarantee the highest quality in the development of the products, systems and services of our clients. Visure is headquartered in Spain and provides a large distributor network throughout the world. For more information, please visit www.visuresolutions.com

SANTA CLARA, Calif., DesignCon, Booth 301, Feb. 2, 2010, Agilent Technologies Inc. (NYSE: A) today announced a second data channel option and a new analysis option for SER/FER for its J-BERT N4903B high-performance serial BERT. The new options significantly simplify receiver tolerance testing of USB 3.0 and SATA devices.

The J-BERT’s second output channel option provides more flexible characterization and compliance testing of receivers by enabling cross-talk testing, Out-of-Band (OOB) tests, and emulation of 2-tap de-emphasis signals on a serial BERT.

The new symbol error analysis option allows error counting of coded, packetized and retimed data streams. This significantly simplifies jitter tolerance testing of devices, using retimed loopback modes, such as SATA, USB 3.0, SAS, and MIPI M-Phy.

USB 3.0 and SATA are popular examples of digital interfaces using 8B/10B coded and packetized data streams with retimed loopback. These digital interfaces require special test capabilities for the characterization and compliance testing of receivers.

Coding is used to limit the number of consecutive 0s or 1s in transmitted bit streams. Running disparity is used to achieve DC balance. The transmitter and receiver on both ends of the link are clocked with independent reference clocks. Differences in the reference clocks are compensated by inserting or deleting filler symbols, such as ALIGN or SKIP symbols.

During receiver tolerance testing, the device under test (DUT) operates in a retimed loopback mode. This means that the bit stream received by the BERT analyzer can be different in data rate and bit pattern from what the BERT generator sent out, even if no receive error occurred. This behavior is challenging for traditional bit error ratio testers that expect a predictable pattern to compare with the actually received bits. Receiver tolerance testing required either external error-counting equipment or a BERT, which had pattern capture mode to retrieve the error ratio from a DUT’s built-in error counter.

“This is a significant milestone in adapting the industry’s leading receiver tolerance test solution to the latest requirements,” said Jorgen Beck, general manager of Agilent’s Digital Photonic Test product line. “Receiver tolerance testing is considerably simplified with the second data channel option and the symbol error analysis option for J-BERT. Once again, we prove our commitment to enable R&D teams to release the next generation of robust high-speed digital interfaces for the computer, consumer and storage industries.”

Benefits of the second output channel option of the Agilent J-BERT N4903B include:

• a second data output with independently adjustable output parameters and individual 32 MB user pattern and PRBS generation;
• increased test flexibility with the second data output channel that can be used for multiplexing to higher data rates, generating controlling signals for sequence triggering, for cross-talk testing, or when using external channel addition for emulating 3-level signals or 2-tap de-emphasis; and
• an upgradeable option to address future requirements.

Benefits of the Agilent N4903B option SER/FER analysis include:

• integrated receiver tolerance testing capability for USB3, SATA, SAS, MIPI M-Phy by analyzing coded, packetized data and filters filler symbols;
• filtering of up to four user-definable filler symbols;
• filtering of consecutive occurrences up to 12.5 Gb/s without dead time;
• display of calculated bit error or symbol error ratio in real-time;
• ability to enter and monitor sent and received patterns in 8B/10B coded or uncoded bit or symbol format;
• handles running disparity automatically; and an upgrade option to existing Agilent’s J-BERT N4903B.
• J-BERT N4903B was chosen by the DesignCon committee as finalist under the category Test & Measurement.

Agilent Technologies offers a portfolio of solutions for testing USB and SATA, addressing all of the current variants and spanning the entire lifecycle from R&D and design verification through official compliance testing. The company participates actively in the USB Implementers Forum (USB-IF) and the SATA-Interoperability program allowing it to influence and respond rapidly to changes in the test specifications.

U.S. Pricing and Availability

The Agilent J-BERT N4903B Option 002 “Pattern and PRBS on auxiliary data output” is now available for ordering. Pricing for the Agilent Option 002 is $24,800.

The Agilent J-BERT N4903B Option A02 “SER/FER analysis” is now available for ordering. Pricing for the Agilent Option A02 is $14,500.

About DesignCon

DesignCon is the definitive event for electronic design experts spanning chip, package, board, and system domains, addressing common issues in signal integrity, power management, interconnection, and design verification.

Agilent experts will offer various technical presentations throughout the show. For more information and a free pass to the event, visit www.agilent.com/find/DesignCon. Since 1998, Agilent has been a sponsor of DesignCon in partnership with the International Engineering Consortium (IEC).

Agilent’s Digital Test Standards Program

Agilent’s solutions for digital applications are driven and supported by Agilent experts who are involved in various international standard committees. We call it the Agilent Digital Test Standards Program. Our experts are active in the Joint Electronic Devices Engineering Council (JEDEC), PCI Special Interest Group (PCI-SIG(r)), Video Electronics Standards Association (VESA), Serial ATA International Organization (SATA-IO), Serial Attached SCSI (T10), USB-Implementers Forum (USB-IF), Mobile Industry Processor Interface (MIPI) Alliance, Ethernet standards (IEEE 802.3), Optical Internetworking Forum (OIF), and many others. Our involvement in these standards groups and their related workshops, plugfests, and seminars enables Agilent to bring the right solutions to the market when our customers need them.