feature article
Subscribe Now

Flashing, Hetero Unions, and Changing Your Name

Flash Lite Adds Sex Appeal to Embedded Systems

A real-time operating system (RTOS) used to be just a tiny microkernel of code. Nowadays they’re growing into fully featured operating systems with their own development tools and third-party support. Just a few months ago, Intel paid $884 million in cash to acquire RTOS vendor Wind River Systems. Clearly, we’ve moved beyond a few kilobytes of microkernel code.

Another case in point is QNX, makers of the popular Neutrino RTOS. With help from desktop-software heavyweight Adobe, QNX ported Adobe’s ubiquitous Flash software to Neutrino. Now you can have Flash animation on your embedded systems, at least so long as you’re using Neutrino. It’s an interesting match.

Running Flash animation on a small embedded system is tough, as every iPhone user knows. Flash is big, complex, and resource-intensive. It’s not a trivial porting exercise, nor does it leave a light footprint on processors or memory. In short, you’ve got to really want it.

On the plus side, Flash has always been hardware- and software-independent. It’s not tied to the PC or Mac architecture, or to anybody’s processor. Like Java, Flash creates its own virtual machine, which makes it portable. But, like Java, that also makes it slow, fat, and complicated.

QNX calls its version Flash Lite (har, har), and it’s a streamlined version of the Flash we’re all familiar with from Web browsers. Still, it’s got most of the features any self-respecting embedded designer would want. Even in its “Lite” form, however, Flash requires some decent embedded horsepower. QNX recommends a 400-MHz or faster processor and a couple of megabytes of extra RAM beyond what your application normally requires. You might get away with a slower CPU if you have a small screen (less than 800×600, for example) or less memory if you know ahead of time exactly what Flash files you might be displaying.

As a rule of thumb, QNX says to plan on 1MB of RAM for the Flash Lite software itself, plus whatever space your animation requires. The good news is, .SWF (ShockWave) files are pretty small because they use mostly vector graphics and not bitmaps, so you’re probably looking at around 100KB, not megabytes, for downloaded content. The bad news is, Flash is heavily interpreted, so you’ll need to allocate lots of heap space. Figure on 10-15 times the size of your content in heap space, so that’s another 1.5MB of RAM for our 100KB example.

Oh, and it’s going to be slow. That is, unless your processor comes with some sort of OpenVG acceleration. As you can see, adding Flash Lite is not for the faint of heart or light of wallet. But those hardware requirements aren’t out of line for many high-end embedded systems, and the ability to download and run Flash animation will add serious, er, flash and dazzle. There are a lot of clever and creative Flash developers out there, and it will be nice to bring desktop-quality graphics and user interfaces to high-end embedded systems. Now if I could just get it working on my iPhone.

MIPS and Tensilica Make Nice

In other news, erstwhile competitors MIPS Technologies and Tensilica have decided it’s better to shake hands than make fists. For the first time, the two microprocessor-design companies have come up with a way for SoC designers to use both processors on the same chip. And why would said SoC designers want to do this? Because two heads are better than one.

MIPS is the second-place leader (behind ARM) in licensing 32-bit microprocessor designs. Its licensees’ chips are popular in video games, TVs, set-top boxes, and an uncountable multitude of other devices. MIPS is popular, in part, because it’s a straightforward RISC design, clean and simple. And fast. And with lots of software support.

Tensilica, on the other hand, designs specialty processors. Or, more precisely, its licensees design specialty processors: the Tensilica CPU architecture can be extended, molded, tweaked, and modified to suit the designer’s whims. It’s like a processor construction set, and Tensilica-based chips are like snowflakes: no two are alike. That makes Tensilica popular among designers who want a little something different, either because they’re deliberately obfuscating their design or because they need special processing capabilities.

Like peanut butter and chocolate, these two disparate microprocessor flavors go well together. The two companies have typically competed, but have now decided that it’s better to embrace diversity. In practical terms, this means that MIPS sales and support staff won’t give you a hard time for placing a Tensilica core alongside your MIPS processor, and vice versa. In fact, both companies point out that the two processors work pretty well together after all. Who knew?

In a typical embodiment, the Tensilica processor would act as a media accelerator while the MIPS processor runs the “mainstream” operating system or user code. Although MIPS offers an optional MIPS-3D extension on some of its processors, it’s not in the same league as a standalone processor like Tensilica’s. And given that MIPS has been popular in a lot of media-related consumer electronics, it’s a good thing the company is giving its blessing to such heterogeneous unions.

Technically, the two processors communicate over a shared system bus. They’re not coprocessors in the usual sense. That’s both good and bad. It’s good, because you can develop the two hardware cores more or less independently of one another, and you can create and debug the software separately. On the downside, they’re not tightly locked together with a private communications medium, so they’re permanently at arm’s length. Some couples are just not meant to be.

Of course, the two processors have entirely different instruction sets and programming models, so they’ll always be destined to run different code. This is definitely a “two-headed” type of multicore cooperation. Still, it’s nice to see two former competitors bury the hatchet and realize that today’s SoC designs incorporate a lot of features that aren’t necessarily available from a single source. Embedded design is all about solving problems, and it looks like MIPS and Tensilica have solved one for us.

AMCC Becomes Applied Micro

Meanwhile, fellow microprocessor maker AMCC has changed its name to Applied Micro. Actually it was always called Applied Micro (fully Applied Micro Circuits Corporation, hence AMCC) but now prefers the name spelled out.

That’s it? Well, the change was actually more extensive than that. The company also whacked the entire executive staff, replacing them mostly with Indian expats. The company still makes products primarily for the telecommunications and networking industries, though now it’s trying to be less of a boutique supplier and more of a broad-range company.

Applied Micro still uses PowerPC in most of its chips. If you recall, this is the company that took over IBM’s midrange 403- and 440-series microprocessors a few years ago. That acquisition has been working well for them, and the company has designed and built a number of its own unique PowerPC chips since that time. The 460EX, for example, runs at 1.2 GHz with an FPU, and its Titan processor is a 1.5-GHz dual-core design that is unique to Applied Micro. The engineers there clearly know what they’re doing. 

Leave a Reply

featured blogs
May 21, 2022
May is Asian American and Pacific Islander (AAPI) Heritage Month. We would like to spotlight some of our incredible AAPI-identifying employees to celebrate. We recognize the important influence that... ...
May 20, 2022
I'm very happy with my new OMTech 40W CO2 laser engraver/cutter, but only because the folks from Makers Local 256 helped me get it up and running....
May 19, 2022
Learn about the AI chip design breakthroughs and case studies discussed at SNUG Silicon Valley 2022, including autonomous PPA optimization using DSO.ai. The post Key Highlights from SNUG 2022: AI Is Fast Forwarding Chip Design appeared first on From Silicon To Software....
May 12, 2022
By Shelly Stalnaker Every year, the editors of Elektronik in Germany compile a list of the most interesting and innovative… ...

featured video

Synopsys PPA(V) Voltage Optimization

Sponsored by Synopsys

Performance-per-watt has emerged as one of the highest priorities in design quality, leading to a shift in technology focus and design power optimization methodologies. Variable operating voltage possess high potential in optimizing performance-per-watt results but requires a signoff accurate and efficient methodology to explore. Synopsys Fusion Design Platform™, uniquely built on a singular RTL-to-GDSII data model, delivers a full-flow voltage optimization and closure methodology to achieve the best performance-per-watt results for the most demanding semiconductor segments.

Learn More

featured paper

Reduce EV cost and improve drive range by integrating powertrain systems

Sponsored by Texas Instruments

When you can create automotive applications that do more with fewer parts, you’ll reduce both weight and cost and improve reliability. That’s the idea behind integrating electric vehicle (EV) and hybrid electric vehicle (HEV) designs.

Click to read more

featured chalk talk

Powering Servers and AI with Ultra-Efficient IPOL Voltage Regulators

Sponsored by Infineon

For today’s networking, telecom, server, and enterprise storage applications, power efficiency and power density are crucial components to the success of their power management. In this episode of Chalk Talk, Amelia Dalton and Dr. Davood Yazdani from Infineon chat about the details of Infineon’s ultra-efficient integrated point of load voltage regulators. Davood and Amelia take a closer look at the operation of these integrated point of load voltage regulators and why using the Infineon OptiMOS 5 FETs combined with the Infineon Fast Constant On Time controller engine make them a great solution for your next design.

Click here for more information about Integrated POL Voltage Regulators