feature article
Subscribe Now

Preaching to the Choir

Proselytizing Programmable Logic

The faithful are easy. An FPGA company rolls out a new line and the bragging begins: “More LUTs, increased Fmax, Shorter PnR runs, faster MGTs!” 

The faithful are impressed: “Yes! Tell us more! Have you increased the LUT width? Added more FF’s to your LEs? Diversified your mix of hardened IP blocks? Increased the BRAM ratio? ” 

(The Faithful talk like that most of the time – all acrimoniously acronymic, feasting in their insider insight, devouring the minutiae with reckless abandon, disdainfully dismissing the unwashed masses.)

The rest of the world, however, is less easily amused:  “FGP- what?  Can I make a digital camera out of one?  Or is this a new name for the LPGA?  What’s a LUT?”

If you’re trying to evangelize a technology – to spread it into new markets – you won’t get very far preaching to the faithful.  They’re already on your team.  You need to reach out to the broader audience.  The key is to go to where they are ideologically.  You need to understand the locals and learn their language.  Then you can bring them your message in a technology mission of sorts.

If you haven’t noticed, the past few years have seen FPGA companies launching missions in a number of villages around the land.  They wanted to win over DSP designers, so they started speaking primitive MATLAB and Simulink.  They learned to spell FFT.  Instead of talking about how many fewer timing violations you’d get with new synthesis options, they waxed on the benefits of parallelized multiplication.  It was a worthy first effort.  Better than marketing baby-back ribs to vegans, but still a bit lacking in results.  A few of the more adventurous signal processing folks swerved into the FPGA lane and started accelerating their designs to autobahn speeds.  Most of the market, however, continued with their DSP processors, unaware and unimpressed.

Next came the embedded systems market.  Attacking that group is a little like saying your target demographic is “people with hair.”  FPGA companies did a nice first effort here as well.  “Hey, we can put a 32-bit RISC machine on an FPGA…” 

Unwittingly, they had tapped into a DIFFERENT base’s “faithful.”  “Oh yeah?  Can I simultaneously boot Linux, Windows CE, and Nucleus with memory management on one and hard real-time constraints on another – all insulated through the security of an embedded hypervisor and debuggable with a remote-hosted, virtualized, Eclipse-based multi-core IDE while running an embedded relational database with cross-partition access for varying levels of security in qualified applications written in various dialects of C++, Ada, Java, and FORTH?”

“(Ulp!) We, uh, have on-chip block RAM.”

“Do you also have embedded flash (with load-leveling), DDR3 interfaces, multi-port RAM and predictive branch execution when running multiple soft-cores in an ASMP configuration?”

“Hey, can I offer you a souvenir USB memory stick?”

Over time, however, FPGA evangelism has gotten more sophisticated and more focused.  Happily.  One of the earliest examples was a result of Xilinx’s “vertical marketing” efforts way back around the turn of the millennium.  (Wow, that makes 9 years sound like a LONG time, doesn’t it?)  Xilinx had basically established a set of marketing groups, staffed primarily with highly experienced marketers from specific vertical areas… aerospace, automotive… (and those are just the “A’s”).  They acted like translators from FPGA-ese to the native language.  “We don’t talk to automotive designers about LUT counts – we talk about CAN bus.”  When applied to specific market opportunities for programmable logic infiltration, these groups were highly effective.  

More recently, and to a greater extreme, QuickLogic re-invented their entire company around the notion of hiding the FPGA-isms of their FPGAs.  Instead of slipping a vertical marketing group alongside their horizontal marketing groups, they went whole-hog into the ruse. (Sorry, vegans, that was two shots in one article, wasn’t it?)  QuickLogic had an advantage and a problem.  Their advantage was that their anti-fuse FPGA technology had excellent power efficiency, great stability, instant start-up, no configuration logic requirement, and comparatively high operating frequencies.  The problem was that they were also one-time programmable – which meant that FPGA designers (the Faithful) were put off by the lack of reprogrammability and the idea that they needed a Pez dispenser of FPGAs and a high-speed socket on their development board to do a project.  The solution?  Drop the “FPGA” label and invent a new term “CSSP” (Customer-Specific Standard Product).  Basically, they design some very cool applications using their (shhh, don’t tell – FPGAs) and you can call them up and order some – with customization options that make sense to you in your market for your application.  You don’t have to learn design tools, you don’t have to think about LUTs, synthesis pragmas, timing slack, or unroutes. You just pick the peripherals that you want with your core, and your chips arrive ready-to-run.  It’s kinda’ like ordering a sandwich.

Now, more companies are jumping on the “package for other markets” bandwagon in earnest.  Xilinx, in addition to their Virtex-6 launch, is highlighting a strategy that supplies “almost done” designs including purposeful development boards, a domain-specific range of IP, and reference designs that are just waiting for you to clip in that little “value added” part that distinguishes your product from the pack.  If you’re designing a triple-cantilevered franistan, and you see a development board with a double-cantilevered franistan all up and working out of the box, you can’t help but envision a way that this device could solve your problem. 

Actel too, is taking a shot at the lucrative uninitiated.  With their latest devices, they are beginning to offer not only reference designs, but a full-blown custom GUI that allows you to select the particular options you’d like to see in your finished chip – without ever pulling up an HDL editor.  They start with a traditional “reference design” style platform, but then they put on it a simple, domain-specific user interface that allows you to customize the implementation for your particular application.  In areas like power management or motor control, this may be just what the non-FPGA-o-philes are looking for.

As we move ahead, look for more companies offering FPGAs in sheep’s clothing.  The language they’ll speak will sound strangely familiar.  The problems they’re solving will be yours, and the FPGA-ese will be carefully muted in the background.  

Leave a Reply

featured blogs
Apr 19, 2021
Cache coherency is not a new concept. Coherent architectures have existed for many generations of CPU and Interconnect designs. Verifying adherence to coherency rules in SoCs has always been one of... [[ Click on the title to access the full blog on the Cadence Community sit...
Apr 19, 2021
Samtec blog readers are used to hearing about high-performance design. However, we see an increase in intertest in power integrity (PI). PI grows more crucial with each design iteration, yet many engineers are just starting to understand PI. That raises an interesting questio...
Apr 15, 2021
Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs. The post Scaling FPGA-Based Prototyping to Meet Verification Demands of Complex SoCs appeared first on From Silic...
Apr 14, 2021
By Simon Favre If you're not using critical area analysis and design for manufacturing to… The post DFM: Still a really good thing to do! appeared first on Design with Calibre....

featured video

Learn the basics of Hall Effect sensors

Sponsored by Texas Instruments

This video introduces Hall Effect, permanent magnets and various magnetic properties. It'll walk through the benefits of Hall Effect sensors, how Hall ICs compare to discrete Hall elements and the different types of Hall Effect sensors.

Click here for more information

featured paper

Understanding the Foundations of Quiescent Current in Linear Power Systems

Sponsored by Texas Instruments

Minimizing power consumption is an important design consideration, especially in battery-powered systems that utilize linear regulators or low-dropout regulators (LDOs). Read this new whitepaper to learn the fundamentals of IQ in linear-power systems, how to predict behavior in dropout conditions, and maintain minimal disturbance during the load transient response.

Click here to download the whitepaper

featured chalk talk

RF Interconnect for 12G-SDI Broadcast Applications

Sponsored by Mouser Electronics and Amphenol RF

Today’s 4K and emerging 8K video standards require an enormous amount of bandwidth. And, with all that bandwidth, there are new demands on our interconnects. In this episode of Chalk Talk, Amelia Dalton chats with Mike Comer and Ron Orban of Amphenol RF about the evolution of broadcast technology and the latest interconnect solutions that are required to meet these new demands.

Click here for more information about Amphenol RF Adapters & Cable Assemblies for Broadcast