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Go, Stop, Yield

Dude! Where's my Chip?

Craig (not his real name) is the lead engineer on his company’s most important project. So far, Craig has been worth his weight in gold (which is about $1.6M assuming $550 per troy ounce at his current weight of 2916 troy ounces). Besides working out regularly to keep those unwanted troy ounces off, Craig keeps up with the very latest FPGA technologies so he can make solid decisions in creating his company’s new flagship electronic product.

This time, Craig chose a state-of-the-art 90nm FPGA as the centerpiece of his masterpiece. The product fit was perfect. Before this FPGA, there had never been a programmable logic product that could meet his price, density, and performance requirements. The selection of an FPGA, however, is what made the whole product concept work. His company could be among the first to introduce a board with support for the new standard, and they could rapidly upgrade the product in the field as the standard evolved. Furthermore, their customers would be able to upgrade to the next standard online by simply downloading a new bitstream to reconfigure the FPGA.

As soon as the next standard was stable, Craig’s competitors would begin working to create a new line of boards. Craig’s company, on the other hand, would be miles ahead with their products already in customers’ hands and installed. It was a great market strategy enabled by a great design using the latest available programmable logic technology.

The technology was so new, in fact, that Craig was one of the first to get his hands on the development tools. It was quite a wait after that for the first development board to show up. The distributor had promised the boards a couple of times, but it seemed they were having some sort of supply chain difficulty. Once the boards arrived, however, Craig’s team quickly had their design up and working. Having the design tools and libraries in advance had given them quite a head start, so there was really very little to fix once the real hardware showed up. Most of the effort then went into verification of the design with real input streams, making sure the system would work at speed.

Next, the board design guys finished their layout and did a small run using the few FPGA parts the distributor had sent them for their initial prototypes. The project was actually running ahead of schedule, but the distributor said the higher volume shipments of FPGAs wouldn’t be available for a couple of months. The prototypes worked perfectly, however, so the marketing guys at Craig’s company had something to demonstrate at their big tradeshow. Craig was seen as a hero for bringing the prototype units in well before the show. It allowed the technical marketing folks time to build a killer demo, after thinking that they wouldn’t be ready to announce at the show at all.

The Marcom machine kicked into gear. Press releases went out, the booth at the tradeshow was packed, and technical articles raving about the new product showed up in several industry publications. The sales organization was swamped with leads and began pre-selling at a frantic pace. Back in the lab, the FPGA strategy was proving its worth. A hardware bug had been found (on the floor at the tradeshow, no less) and Craig’s team had spun a new version of the FPGA design to fix it. No physical hardware changes were required, and the demo units were simply upgraded with the new bitstream. Craig’s valuation headed up from gold toward platinum.

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Back in the lab, however, Craig wasn’t feeling so hot. He’d headed off to Maui for a couple weeks of well-deserved rest after the big tradeshow push. When he returned to the office, there were a bunch of e-mails from manufacturing… and from purchasing… and from his manager… and from his distributor rep. It seems that the production run was shut down because the distributor hadn’t been able to deliver the FPGAs yet. The other components were all in inventory, even being scaled up to meet the new production targets that had been set in response to the pre-order boon. There was some delay in the FPGAs. The distributor was pointing to yield problems at the fab.

Craig knew how the FPGA business works. The fab wasn’t his problem. FPGAs are the products of “fabless” semiconductor companies. The companies that design and market the chips outsource the semiconductor fabrication to one (or more) of the huge fabs like UMC, TSMC, Toshiba, IBM, and Fujitsu. The fab provides the production line and the process, and the FPGA company provides the detailed design. The devices are typically sold by yet another company – typically a large distributor like Arrow, Avnet or NuHorizons. In many cases, even a fourth company is involved. That company might produce development or production boards, IP, and development software that surrounds the FPGA and shortens the design cycle for particular types of applications.

Craig browsed the newsgroups to look for information on anyone else having delivery problems with his FPGA. Sadly, he found quite a few. Some members of his chosen FPGA family were available in volume immediately, but volume shipments of his chip had been pushed back over a quarter from the original estimate. Although the FPGA company itself wasn’t commenting on specifics, one of the key features of Craig’s FPGA wasn’t yielding well. It seems that, instead of good devices per wafer, they were talking about wafers per good device. At those production rates, only the biggest customers with the most influence (i.e. not Craig’s company) were getting any devices at all. It was so bad that even the distributor couldn’t get enough new parts to produce development boards.

Craig chatted at length with the marketing rep from the FPGA company. The problem wouldn’t move. These parts simply did not exist. In an effort to salvage some situations, the FPGA company had even started delivering parts with a smaller number of the “problem” IP cores working, but that didn’t help Craig. His design used all 16 of them. The company also suggested that Craig look at using one of their older devices instead. Even with big cost breaks, that plan was a non-starter. The performance Craig needed just wasn’t there in the old devices, and even making a run at it would cost weeks to months of re-design time.

Next, Craig browsed the job boards. Several companies in the Midwest were looking for senior systems designers with FPGA experience. He could leave inexplicably while his stock was still high, join the new company with a big bonus, and leave these guys to sort out the production and delivery problems on their own. Trouble was, Craig’s kids were happy in their schools and in their neighborhood. Craig’s wife had a career she loved, and a good chunk of the family’s net worth was wrapped up in stock options at this company. Things were looking pretty bleak. Craig futures on the commodity exchange were at an all-time low.

Where did Craig go wrong? What could he have done differently? Is Craig even real? What happened next? Could I be Craig? How much is gold worth anyway?

Craig went wrong by not fully researching his device and balancing the risks with his enthusiasm for the FPGA strategy. He got caught up in the marketing pitch and didn’t ask himself fundamental questions about adopting a new technology that wasn’t yet proven in volume production. He also failed to consider the impact to his company if that device didn’t deliver on time, or with advertised capability, and he didn’t have a “Plan B” ready to overcome those issues.

If Craig had looked at the situation more carefully, he probably would have concluded that the FPGA strategy wasn’t worth the risk. If the FPGA benefits were just too compelling, he could also have done a backup design based on some alternative design technology. He might have also done a more aggressive optimization plan aimed at getting his design to work on some FPGA that was already shipping in volume. With advanced design techniques and tools like physical synthesis, sometimes silicon can be pushed farther than you’d think. With a working design based on an older FPGA in his pocket, he could have smoothly transitioned to the new device at his convenience without millions of dollars of unfulfillable orders hanging in the balance. In reality, there probably was a good reason none of Craig’s competitors had an FPGA solution ready for market… it just wasn’t possible yet.

Craig is not real, but rather he is a composite of several real designers we’ve talked to that have found themselves in similar situations. Given company policies about talking to the press, non-disclosure agreements, and fear of compromising ongoing remedies, it is very difficult to find design engineers or managers that will speak on the record. Nonetheless, several offered us enough anecdotal experience to allow us to create Craig, the composite tragic hero of FPGA yield problems.

On the FPGA vendor side, there are no easy answers. Getting a new product working on a new semiconductor process, like 90nm for example, is a monumental challenge, packed with uncertainty. For a variety of business reasons, FPGA vendors must estimate their ability to deliver on a new product long before they have clear data themselves. They have to look at their experience with previous process generations and try to draw a curve that represents their predicted volume ramp. If they get it right, their customers are happy. If they are too pessimistic, competitors fly in with substitute product, scooping up all the business before they can even engage. If they are too optimistic, the Craig scenario rears its ugly head.

Chuck Tralka, director of product marketing for (the real-world, non-composite, industry leader) Xilinx’s Advanced Products Division explains: “The problem you outlined is frankly one that semiconductor companies have to contend with as we’re delivering new processes. There’s a long lead time, new technology, and a great degree of uncertainty. Yet, we all exist in a very competitive environment, so there’s a penalty to pay for both over- and underestimating. A lot of work goes into estimating what we can deliver and when. Even with that, there is also tremendous uncertainty in the customer demand picture.”

The supply and demand sides of semiconductor rollouts are not only uncertain, but lumpy. Big spikes or dips in demand and in manufacturing yield are regular occurrences. These spikes and dips can align to spell big trouble – of the Craig kind. “We do our best, but either the supply or demand changing by even a little bit can dramatically alter the availability of a new product going into volume production,” Tralka continues. “There is much concern on both sides when getting out a new product, which typically is the source of greatest uncertainty, because new products are often associated with new processes. Customers are interested in taking advantage of the benefits that a new product can bring, like higher performance, more sophisticated features, and lower costs. If customers didn’t need any of these things, or if competitors weren’t also working to deliver those things, there wouldn’t be such a drive to manage the move to new nodes.”

Like most FPGA vendors, Xilinx says they try to err on the side of conservatism in their estimates. Small variables can find leverage to become big problems, however. Fairly small changes in defect density, for example, can have a dramatic impact on yield. “Customers never complain about us having too much product,” Tralka observes. “Our objective is to stay ahead of the curve, so we try to bias our estimates in favor of that.”

Recently, Xilinx has struggled with delivery of some members of the 90nm Virtex4 family. Most visible have been the delays in shipping some FX devices containing multi-gigabit transceivers (MGTs). A few of our “Craigs” were held up waiting for these FPGAs. To be fair, archrival Altera says they are having no delivery issues with their current product lines. In our list of “Craigs” nobody we found was impacted by Altera’s device delivery. Other FPGA vendors have also occasionally experienced yield problems (some well publicized) that have led to delivery shortfalls. If you look at the FPGA industry’s “latest and greatest” new products over a number of years and a number of vendors… Caveat Designor!

At the end of the day, it is we as system designers that are responsible for protecting our projects from yield and delivery problems. The next generation of FPGA technology will always blast its siren song in your direction, patiently persuading you to jump on the next-node bandwagon. The marketing folks will always be there with their soothing voices and reassuring PowerPoint slides. “Don’t worry, Craig. Everything will be fine…” If you’re designing at the edge of the envelope, however, you may get a paper cut. You should plan accordingly.

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