feature article
Subscribe Now

The Programmable Base Station

Today there are 1.6 billion wireless subscribers in the world with the number anticipated to grow to 2.6 billion in the next 5 years. These numbers show that wireless subscriptions have already surpassed the number of internet users (expected to top 1 billion by mid-2005) and will represent a 37% penetration rate of the entire world population by 2010! To support this growth, wireless infrastructure deployments will also have to experience tremendous growth during the next few years.

Even with this growth, the wireless infrastructure industry can still be classified as entering a mature life cycle phase as we are beginning to see major industry consolidation. For example, Sprint recently bought Nextel to form a combined entity with revenues exceeding $40 billion and Cingular acquired AT&T wireless forming a combined entity with revenues of over $30 billion. These consolidations have positioned the cellular service providers to exercise a greater amount of purchasing power over the wireless infrastructure providers to force them to greatly decrease infrastructure equipment prices.

With this strong pressure to drive down infrastructure prices, next generation base station deployments are being designed to reduce costs, as measured by cost per channel, while still adding functionality to support new services, protocols and changing subscriber usage patterns. The cost reductions are targeting both CAPEX and OPEX, with the impact of each cost element on the wireless cost structure shown in Table 1. To begin addressing these cost challenges, the wireless base station designs are shifting away from using ASIC technology to a reliance on more readily available off-the-shelf programmable components such as FPGAs. This shift is driven both by FPGA technology improvements over previous generations of FPGAs that increase their processing power and enable a much lower cost per channel as well as the integrated building blocks such high-performance digital signal processing to implement specific baseband and radio algorithmic functionality. This migration to FPGAs is not just an attempt to reduce costs in pursuit of creating a common platform to achieve commoditization – this is also being driven by time-to-market pressures along with the need to make in-field upgrades of base station deployments.

Cost

Percentage
Category

Annualized Capital Costs

16%

CAPEX

Interconnect

9%

CAPEX

Annualized Equipment

6%

CAPEX

Marketing

28%

OPEX

Administration

15%

OPEX

Network Maintenance

14%

OPEX

Billing

12%

OPEX

Table 1: Cost Structure for US Mobile Operators (FCC)

The ability of programmable logic devices to perform remote programmable optimization can help improve wireless antenna efficiency by enabling remote radio tuning to compensate for local environmental changes or usage patterns. This ability allows infrastructure providers to take a huge step forward towards providing the “anytime, anywhere” nirvana service for the cellular subscribers. Nearly half of wireless subscribers rank clear and reliable communications as the most important evaluation criteria for wireless service while over one-third indicate that continuous extended area coverage is most important. Also worthy of note is that one prominent US-based cellular company has created a multi-million dollar advertising campaign around these issues with their ubiquitous “Can you hear me now?” catch phrase. In addition to antenna tuning, the ability of FPGA devices to be programmed in the field enables central site operators to perform remote servicing, which may eliminate the need for a technician to visit a site (cost of about $150 per visit) and help to reduce site down time. Solving these issues helps wireless service providers lower their customer churn and enables marketing expenditures to be focused on other aspects of customer acquisition and retention.

These in-field upgrades are also very important for wireless infrastructure providers to future-proof their systems being deployed in the field. New wireless technologies such as W-CDMA, TD-SCDMA, EDGE, 1xEV-DO and WiMAX are being introduced to support new services. These services, such as picture exchanges, internet searches, music downloads and streaming video, will greatly increase the bandwidth requirements per user over what is currently experienced today. In addition, to combat the cost-efficient and rapidly growing “Hot Spots” that are currently stealing premium data centric customers from the cellular operators, infrastructure providers are seeking ways to provide smaller, more cost-effective solutions such as Remote Radio Heads. These units are used to supplement base station macrocells with microcells and picocells which are much smaller in physical size and can be deployed faster and in more places to fill coverage gaps or quickly add additional capacity to meet requirements in high traffic areas. These units work in conjunction with the more costly base station towers to provide inexpensive voice, data and video services to the end users. These units should be built with programmable devices such as FPGAs due to the need to configure a remote unit to handle localized usage patterns in different geographies while overcoming obstructions in the cellular footprint.

As the wireless industry enters its maturation phase, infrastructure providers will have to rely more heavily on devices such as FPGAs to balance current requirements of providing cost-effective solutions with allowing for future in-field upgrades. Fortunately for the infrastructure provides, the types of FPGA devices are shipping now and can effectively be used to meet the design requirements for cost-effective flexibility.

 

About the Author
David Gamba is Senior Marketing Manager for the Strategic Solutions Marketing Group at Xilinx. In this role, Gamba is responsible for outbound marketing for all vertical markets supported by Xilinx solutions. Gamba joined Xilinx in 2004 and brings over eight years of experience in the semiconductor industry where he served in a variety of marketing and sales roles including technical sales, product definition and technical marketing. Prior to Xilinx, Gamba held various positions at Aeluros, Conexant and Altera. Gamba holds a bachelor’s degree in electrical engineering from UCLA, a master’s degree in electrical engineering and computer science from UC Berkeley, and an MBA degree from Stanford University.

Leave a Reply

featured blogs
Jun 6, 2023
Learn about our PVT Monitor IP, a key component of our SLM chip monitoring solutions, which successfully taped out on TSMC's N5 and N3E processes. The post Synopsys Tapes Out SLM PVT Monitor IP on TSMC N5 and N3E Processes appeared first on New Horizons for Chip Design....
Jun 6, 2023
At this year's DesignCon, Meta held a session on '˜PowerTree-Based PDN Analysis, Correlation, and Signoff for MR/AR Systems.' Presented by Kundan Chand and Grace Yu from Meta, they talked about power integrity (PI) analysis using Sigrity Aurora and Power Integrity tools such...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....

featured video

The Role of Artificial Intelligence and Machine Learning in Electronic Design

Sponsored by Cadence Design Systems

In this video, we talk to Paul Cunningham, Senior VP and GM at Cadence, about the transformative role of artificial intelligence and machine learning (AI/ML) in electronic designs. We discuss the transformative period we are experiencing with AI and ML and how Cadence is revolutionizing how we design and verify chips through “computationalizing intuition” and building intuitive systems that learn and adapt to the world around them. With human lives at stake, reliability, and safety are paramount.

Learn More

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

Introduction to Bare Metal AVR Programming
Sponsored by Mouser Electronics and Microchip
Bare metal AVR programming is a great way to write code that is compact, efficient, and easy to maintain. In this episode of Chalk Talk, Ross Satchell from Microchip and I dig into the details of bare metal AVR programming. They take a closer look at the steps involved in this kind of programming, how bare metal compares with other embedded programming options and how you can get started using bare metal AVR programming in your next design.
Jan 25, 2023
17,741 views