Earlier this week, I published a detailed account of the HW/SW Programmable Engine that was the final, undisclosed block in the Xilinx Everest Architecture, to appear first in the company’s 7nm ACAP (the Adaptable Computing Acceleration Platform), which will tape out later this year. (See “Xilinx Puts a Feather in its ACAP: Final block in Xilinx’s 7nm Everest Architecture is Detailed at Hot Chips 30 in Cupertino.”) That article was largely based on a technical presentation given at Hot Chips 30 by Juanjo Noguera, the engineering director of the Xilinx Architecture Group.

However, Xilinx CEO Victor Peng also spoke at Hot Chips 30. In fact, he delivered an hour-long keynote speech during which he discussed the Everest/ACAP project as well as other topics that set the stage for this product’s development, including the death of Moore’s Law.

The Hot Chips 30 organizers just published an hour-long video clip of Peng’s keynote as well as the Q&A session that followed. But you’ll need to jump to YouTube to see it, or you can just watch it below.