editor's blog
Subscribe Now

Laying n-Type Epi

Dopants used to be there just for their doping. But stress is now an important aspect as well, which means the dopant atoms must be sized appropriately as compared to their silicon hosts. This has worked for p-type, where compressive stress is desired. Germanium, which is larger than silicon, compresses the silicon, increasing hole mobility.

n-type should be the reverse: tensile stress is needed, meaning smaller dopant atoms. Phosphorus and carbon are both smaller and can work. Sounds simple, right?

Well, apparently not so. The n-type dopants have a tendency to migrate, and so far increased border security hasn’t worked. OK, kidding. About the security, that is. The migration has remained to be solved.

At Semicon West, Applied Materials announced that they had found a way to create a stable n-type epi layer. How do they manage it, you ask? Keep asking… they’re not telling. There was a mention of millisecond anneals helping to tweak any vagabonds before they get too far. And whatever they do sets up a strict thermal budget, although not so low that it affects the back-end interconnect processing.

Details aside, if this is all working as promised, then we have more control over how to optimize the performance of n- and p-type devices. You can read more in their release.

Leave a Reply

featured blogs
Jan 24, 2020
Someone has created a song by taking Pi, assigning each number to a note, and adding harmonies. The result is strangely captivating....
Jan 24, 2020
[From the last episode: We looked at the different ways memory can be organized in different kinds of systems.] Let'€™s look at a scenario: you run a restaurant, but you'€™re short on funds to hire people. So you'€™re your own chief cook and bottle-washer. You do everyt...
Jan 23, 2020
Embedded design trends typically revolve around three main ideas: faster data rates, smaller form factors and cost-effective solutions. Those design trends drive the theme for the 2020 Embedded Tech Trends forum: The Business and Technology Forum for Critical and Intelligent ...
Jan 22, 2020
Master the design and verification of next gen transport: Part One – Overview Master the design and verification of next gen transport: Part Two – High-Level Synthesis Master the design and verification of next gen transport: Part Three – Functional Safety M...

Featured Video

Automotive Trends Driving New SoC Architectures -- Synopsys

Sponsored by Synopsys

Today’s automotive trends are driving new design requirements for automotive SoCs targeting ADAS, gateways, connected cars and infotainment. Find out why it is essential to use pre-designed, pre-verified, reusable automotive-optimized IP to meet such new requirements and accelerate design time.

Drive Your Next Design to Completion Today with DesignWare IP® for Automotive SoCs