To Err is Human

Holding Technology Accountable

by Kevin Morris

When a Tesla automobile using the new “Autopilot” feature struck a semi trailer resulting in the death of the driver, the inevitable questions began: “Should Tesla disable the feature?”, “Are self-driving cars a good idea?” Of course, the driver was using the feature beyond its recommended envelope. But the incident highlights an interesting quirk of humans. We want to make our own mistakes. When human error - particularly our OWN human error - causes a problem, we are brimming with forgiveness. After all, it could happen to anybody, really. It was a momentary lapse of concentration. We were tired. The kids were acting up. The situation was just too complicated. We were unlucky.

But when the mistake is made by someone else or - most importantly - by our technology, we are suddenly overwhelmed with righteous indignation. How could they have let that happen? What were the engineers thinking? Doesn’t anybody with half a brain DESIGN these things?  Read More

latest news

July 22, 2016

Innovative Integration Announces New Rugged Digital Transceiver K706

July 21, 2016

PrimeTime Smart ECO Technology Cuts Compute Costs by 10X

July 19, 2016

Mentor Graphics Veloce Emulation Platform Helps Barefoot Networks Verify the World’s First Fully Programmable Switch

GIGABYTE and Cavium Announce Official Release of Production-Ready ThunderX®-based Servers

Synopsys' IC Validator Certified by TowerJazz for Signoff Physical Verification

July 15, 2016

VadaTech Announces Three New FMC Carrier PCI Express Cards Featuring High Performance FPGAs

July 13, 2016

Intel Custom Foundry Certifies Cadence Implementation and Signoff Tools for 10nm Tri-Gate Process

July 12, 2016

Synopsys TetraMAX II Speeds Test Generation for STMicroelectronics SoC Designs

Toshiba Plans Deployment of Synopsys TetraMAX II on Upcoming SoC Design

Imec and Synopsys Collaborate on Interconnect Resistivity Model to Enable Early Screening of Interconnect Technology Options at Advanced Nodes

July 11, 2016

SiFive Introduces Industry’s First Open-Source Chip Platforms

Imec and ARM collaborate on Design-Technology Co-Optimization for 7nm technology and beyond

July 06, 2016

D3 Engineering announces availability of DesignCore™ ADAS Development Kit, featuring reference design with Texas Instruments TDA3x automotive vision processor

Synopsys' New HAPS Adaptor for Juno ARM Development Platform Accelerates Software Bring-up

July 01, 2016

Renesas Electronics Streamlines Memory Component Count in Data Center: Enables Quantity Reduction of Memory Devices to 1/15th and 60-Percent Reduction in Memory Power Consumption

FPGA News Archive

From Boards to Systems

Mentor PADS Expands Scope

by Kevin Morris

Choose Your Own FPGA Adventure

Hard IP, eFPGAs and the Moore's Law Bottleneck

by Amelia Dalton

Hamster Wheel

The Ever-elusive Perfect Engineering Environment

by Kevin Morris

The Productivity Gap

Lynx Design System Bridges the Breach Between Chip Capacity and Engineering Ability

by Amelia Dalton

FPGA Article Archive


Editors' Blog

A More Secure Time Server

posted by Bryon Moyer

Time servers allow us to track multiple events from different systems and networks with a consistent time base. But an evildoer can flood such servers with requests, causing crashes. Microsemi has released a new time server that addresses this vulnerability. (13-Jan)

QuickLogic Goes Full SoC for Sensors

posted by Bryon Moyer

QuickLogic has announced a new device that builds on ArcticLink, intended to act as the always-on manager for phones and wearables. (30-Jul)

Rumors Intel Altera Deal is Close

posted by Kevin Morris

The NY Post reported today that sources told them that an Intel/Altera deal was close, and could be done by the end of next week. At the same time, we are hearing from multiple Altera customers who are opposed to the deal. (28-May)

Intel/Altera Agreement (Partially) Tells the Tale

posted by Kevin Morris

We did a lot of speculation in our recent articles about the rumored Intel bid to buy Altera. One of the areas of most intense speculation was the 2013 agreement the two companies signed - for Intel to manufacture 14nm FPGAs for Altera. More than two years after that deal was signed, Intel is rumored to be making an offer to buy Altera for upwards (maybe far upwards) of $10B. But, is the existing 2013 agreement potentially weakening Intel’s bargaining position? (4-May)

Intel Altera Deal Off?

posted by Kevin Morris

Multiple financial news sources are reporting today that talks between Intel and Altera have ended... (9-Apr)

FPGA Editors' Blog Archive



Stand (Tall) and Deliver

Posted on 07/22/16 at 6:50 PM by Lord Loh.

Lord Loh.
Did a Co. seriously have a height requirement for employees? I am sure it was a joke.

Or, I would not be surprised if got sued for discrimination...

From Boards to Systems

Posted on 07/21/16 at 7:43 PM by TotallyLost

And exactly the same problem occurs for FPGA synthesis, place and route software ... and FPGA/EDA companies get it wrong. Including mentor.

The majority of design wins come from Tall/Thin engineers ... the big companies have specialists.

Tall/Thin e…

To Err is Human

Posted on 07/20/16 at 11:44 AM by TotallyLost

Tesla Claims their technology is safer after a single death in 130M miles, however that is a single period, single event, that does not yield a valid standard deviation with a low margin of error. The next event could kill a dozen people, in less than 20M…

When Galaxies Collide

Posted on 07/19/16 at 2:37 PM by RahRho

Coventor's tool is not a process simulator in the TCAD sense. They themselves have referred to SEMulator3D as a process emulation tool.

Coventor had a …

FPGA Forum Archive

FaceBook_32x32.png  Twitter_32x32.png  Feed_32x32.png  

subscribe to our fpga newsletter

FPGA On Demand Archive

Login Required

In order to view this resource, you must log in to our site. Please sign in now.

If you don't already have an acount with us, registering is free and quick. Register now.

Sign In    Register