Bridge Over Pixelated Water

CrossLink Changes the Camera Interface Game

by Amelia Dalton

We're talking about the building blocks of electronic design in this week's Fish Fry. First, we take a closer look at some groundbreaking transistor technology. We investigate new research coming out of the Moscow Institute of Physics and Technology that could finally make graphene tunneling transistors a reality. Also this week, we examine Lattice Semiconductor's CrossLink pASSP with Subra Chandramouli. Subra and I dive down into the details of this new programmable bridging device and reveal how ASSP and the FPGA parts of the CrossLink story can help you with your next camera or interface-enhanced design.  Read More


latest news

May 27, 2016

4DSP’s New FMC120 Advances Embedded MIMO Technology in the FMC form factor

May 26, 2016

6GHz Low Power Direct Conversion I/Q Modulator Simplifies Sideband & Carrier Suppression Calibration

May 25, 2016

Optimised cryptographic solution for home automation on Cortus APS3RP core

TEWS TECHNOLOGIES Introduces mPCIe Module Family with User-Programmable FPGA

May 24, 2016

Semifore Launches CoStar™ Platform to Re-Shape Hardware Design, Software Development and Verification

Optimal+ Selected by Xilinx to Provide Real-Time Analytics for Wafer Sort and Final Test Manufacturing Operations

Synopsys Launches Pre-Wafer Simulation Solution to Reduce Semiconductor Process Development Time

Ampleon demonstrates Wideband System Solution featuring Xilinx DPD IP at IMS 2016

16-Bit, 5Msps SAR ADC with Wide Input Common Mode Range Simplifies Analog Front-End Circuitry

May 20, 2016

Pentek Introduces New Software Radio Modules With Texas Instruments ADC32RF45 A/D Converter

May 19, 2016

Synopsys' Custom Compiler Enabled for Samsung Foundry's 14-nm FinFET Process

May 18, 2016

Avnet and Arizona State University Launch Innovation Lab

Triple-Channel Universal PMIC Supports Low Power FPGA and SoC Processors

May 17, 2016

Aldec Extends Spectrum of Verification Tools for Use in Digital ASIC Designs

Curtiss-Wright Demonstrates Power® Architecture-based Glass Cockpit Display Solution and Advanced Air-Flow Through (AFT) Cooling for 3U Systems

FPGA News Archive

Cooling Off Accelerated Computing

Intel/Altera Attacks Memory Bottleneck

by Kevin Morris

The World’s Best Multiplexer

Lattice CrossLink pASSP Fits Into the Odd Spaces in New Designs

by Jim Turley

FPGAs for the Masses?

Freeing FPGA Implementation from the Hardware Designer's Grip

by Dick Selwood

The Future is Modular

Embedded Design, FMCs and Compact PCs

by Amelia Dalton

FPGA Article Archive

 

Editors' Blog

A More Secure Time Server

posted by Bryon Moyer

Time servers allow us to track multiple events from different systems and networks with a consistent time base. But an evildoer can flood such servers with requests, causing crashes. Microsemi has released a new time server that addresses this vulnerability. (13-Jan)

QuickLogic Goes Full SoC for Sensors

posted by Bryon Moyer

QuickLogic has announced a new device that builds on ArcticLink, intended to act as the always-on manager for phones and wearables. (30-Jul)

Rumors Intel Altera Deal is Close

posted by Kevin Morris

The NY Post reported today that sources told them that an Intel/Altera deal was close, and could be done by the end of next week. At the same time, we are hearing from multiple Altera customers who are opposed to the deal. (28-May)

Intel/Altera Agreement (Partially) Tells the Tale

posted by Kevin Morris

We did a lot of speculation in our recent articles about the rumored Intel bid to buy Altera. One of the areas of most intense speculation was the 2013 agreement the two companies signed - for Intel to manufacture 14nm FPGAs for Altera. More than two years after that deal was signed, Intel is rumored to be making an offer to buy Altera for upwards (maybe far upwards) of $10B. But, is the existing 2013 agreement potentially weakening Intel’s bargaining position? (4-May)

Intel Altera Deal Off?

posted by Kevin Morris

Multiple financial news sources are reporting today that talks between Intel and Altera have ended... (9-Apr)

FPGA Editors' Blog Archive

 

forum

Cooling Off Accelerated Computing

Posted on 05/27/16 at 9:17 AM by KarlS51

This statement is key "One of the key areas to attack is memory. If you look at a typical computing machine, a giant chunk of the energy budget is spent shuffling data back and forth, to and from DRAM."

This is a characteristic of RISC CPUs and RISC wa…

Code, Copyright, and Craziness

Posted on 05/26/16 at 6:05 PM by Jim Turley

Jim Turley
The court just decided in Google's favor. Copyright "fair use" applies in this case.

http://www.recode.net/2016/5/26/11790914/google-defeats-oracle-copyright-java-android

Challenging Challenge Questions

Posted on 05/26/16 at 12:33 PM by bmoyer

bmoyer
Do you have any good challenge-question stories?

Rock, Paper, Firmware

Posted on 05/26/16 at 8:06 AM by dbrower

Resolved - a final state of a customer service event where the "customer stops complaining at us" goal has been achieved.

Apparently has nothing to do with customer satisfaction. I'll bet someone got a bonus for closing tickets at no cost to DJI. Th…

FPGA Forum Archive

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