Design rule checking (DRC) can be the one of the biggest bottlenecks in getting a chip out the door. The computation power required for a large DRC run can be staggering. In this episode of Chalk Talk, Amelia Dalton chats with Christen Decoin from Cadence Design Systems about the Pegasus Verification System which will let your DRC fly!

Click here for more information about the Pegasus Verification System