chalk talk
Subscribe to EE Journal Daily Newsletter

Pegasus Verification System: Let Your DRC Fly!


Design rule checking (DRC) can be the one of the biggest bottlenecks 
in getting a chip out the door. The computation power required for a large DRC run can be staggering. In this episode of Chalk Talk, Amelia Dalton chats with Christian Decoin from Cadence Design Systems about the Pegasus Verification System which will let your DRC fly!

Click here for more information about the Pegasus Verification System

Leave a Reply

featured blogs
Sep 19, 2017
It’s only a week before the first event of USB Developer Days , a series of meetings for USB developers, where the USB 3.2 specification will be formally announced. Much like with any recent smartphone announcement, we know pretty much everything about the new standard b...
Sep 19, 2017
The battle for next-generation optical transceivers remains active. The three leading specifications duking it out include COBO, OSFP and QSFP-DD.  While all have their pros and cons, the industry continues to sort out the best solutions for the front panel and mid-board opt...
Sep 01, 2017
Achronix was delighted to attend the Hot Chips event in Cupertino once again this August. This year saw a bumper turnout, with some very fascinating speakers providing some great insights into the industry. The Achronix team had a chance to meet with many talented people in t...