In this week’s Fish Fry we’re looking for pearls in the the deep waters of EDA. My guest is Scott Bloom from Blue Pearl Software. Scott and I chat about RTL debugging with formal technology, multi-trace technology, and what it’s like to crash land a plane and survive. Also this week, we investigate some serious power-related issues that your signal integrity tool may not be equipped to handle.

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Links for August 21, 2015

More information about Blue Pearl Software

Blue Pearl Software Announces Release 9.1 Featuring New RTL Debugging Environment Including Formal Technology for Clock Domain Crossing (CDC)

New Episode of Chalk Talk: Top 10 Reasons Real Signal Integrity Engineers Demand Power-Aware SI Technology

Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

Darrin Billerbeck, CEO – Lattice Semiconductor

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Andy Pease, CEO – QuickLogic

Paul Kocher, President – Cryptography Research Inc.

Anupam Bakshi, CEO – Agnisys

Dave Kleidermacher, CTO – Green Hills Software

Robert Blake, CEO – Achronix

Jack Harding, CEO – eSilicon

Michiel Ligthart, COO – Verific

Adnan Hamid, CEO – Breker Technologies

Jeff Waters, VP and General Manager – Altera

Simon Davidmann, CEO – Imperas

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The Deep Blue Sea of EDA

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Quickly and accurately identify inter-domain leakage issues in IC designs

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