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Self-driving cars. Machines that learn. Lightning-fast communication across billions of devices in the datasphere. Synopsys technology is at the heart of innovations that are changing the way people work and play in our era of Smart Everything. We provide the world’s most advanced technologies for chip design, verification, IP integration, and software security and quality testing. In short, we help our customers innovate from silicon to software so they can bring Smart Everything to life.


New Horizons for Chip Design

Building the Semiconductor Workforce in Latin America

We're investing in semiconductor workforce development programs in Latin America, including government and academic partnerships to foster engineering talent.

May 23, 2024
AI-Accelerated: Synaptics’ ARC HS58x3 Migration with Synopsys QIK and “Warm Start”

See how Synaptics used our AI-enabled EDA tools and QIK to migrate their ARC DisplayLink processor design to a more advanced semiconductor process node.

May 21, 2024
CoreHW Develops 80GHz mmWave PLL with Synopsys RFIC Design Flow on GlobalFoundries 22FDX Technology

See how CoreHW uses our RFIC Design Flow to develop millimeter wave phase-locked loops for use in ADAS, automotive radar systems, IoT networks, and beyond.

May 9, 2024
How Synopsys IP and TSMC’s N12e Process are Driving AIoT

Learn how artificial intelligence of things (AIoT) applications at the edge rely on TSMC's N12e manufacturing processes and specialized semiconductor IP.

May 8, 2024
Why Analog Design Challenges Need Breakthrough Technologies

Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.

Apr 30, 2024
Want to Mix and Match Dies in a Single Package? UCIe Can Get You There

See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.

Apr 25, 2024
Synopsys and Multibeam Accelerate Innovation with First Production-Ready E-Beam Lithography System

Learn about maskless electron beam lithography and see how Multibeam's industry-first e-beam semiconductor lithography system leverages Synopsys software.

Apr 24, 2024
SLM Solutions for Mission-Critical Aerospace and Government Chip Designs

We explore Aerospace and Government (A&G) chip design and explain how Silicon Lifecycle Management (SLM) ensures semiconductor reliability for A&G applications.

Apr 23, 2024
What You Need to Know About Gate-All-Around Designs

Learn what gate-all-around (GAA) transistors are, explore the switch from fin field-effect transistors (FinFETs), and see the impact on SoC design & EDA tools.

Apr 22, 2024
Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud

See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.

Apr 18, 2024
Leveraging Early Power Network Analysis to Accelerate Chip Design

Learn what IR Drop is, explore the chip design tools and techniques involved in power network analysis, and see how it accelerates the IC design flow.

Apr 16, 2024
Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud

See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA.

Apr 11, 2024

Read more from the Synopsys New Horizons for Chip Design blog…


Chalk Talks Featuring Synopsys

SLM Silicon.da Introduction
In this episode of Chalk Talk, Amelia Dalton and Guy Cortez from Synopsys investigate how Synopsys’ Silicon.da platform can increase engineering productivity and silicon efficiency while providing the tool scalability needed for today’s semiconductor designs. They also walk through the steps involved in a SLM workflow and examine how this open and extensible platform can help you avoid pitfalls in each step of your next IC design.
Dec 6, 2023
One Year of Synopsys Cloud: Adoption, Enhancements and Evolution
The adoption of the cloud in the design automation industry has encouraged innovation across the entire semiconductor lifecycle. In this episode of Chalk Talk, Amelia Dalton chats with Vikram Bhatia from Synopsys about how Synopsys is redefining EDA in the Cloud with the industry’s first complete browser-based EDA-as-a-Service cloud platform. They explore the benefits that this on-demand pay-per use, web-based portal can bring to your next design. 
Jul 11, 2023
Automated Benchmark Tuning
Benchmarking is a great way to measure the performance of computing resources, but benchmark tuning can be a very complicated problem to solve. In this episode of Chalk Talk, Nozar Nozarian from Synopsys and Amelia Dalton investigate Synopsys’ Optimizer Studio that combines an evolution search algorithm with a powerful user interface that can help you quickly setup and run benchmarking experiments with much less effort and time than ever before.
Jan 26, 2023
Expanding SiliconMAX SLM to In-Field
In order to keep up with the rigorous pace of today’s electronic designs, we must have visibility into each step of our IC design lifecycle including debug, bring up and in-field operation. In this episode of Chalk Talk, Amelia Dalton chats with Steve Pateras from Synopsys about in-field infrastructure for silicon lifecycle management, the role that edge analytics play when it comes to in-field optimization, and how cloud analytics, runtime agents and SiliconMAX sensor analytics can provide you more information than ever before for the lifecycle of your IC design.
Jan 24, 2022
10X Faster Analog Simulation with PrimeSim Continuum
IC design has come a very long way in a short amount of time. Today, our SoC designs frequently include integrated analog, 100+ Gigabit data rates and 3D stacked DRAM integrated into our SoCs on interposers. In order to keep our heads above water in all of this IC complexity, we need a unified circuit simulation workflow and a fast signoff SPICE and FastSPICE architecture. In this episode of Chalk Talk, Amelia Dalton chats with Hany Elhak from Synopsys about how the unified workflow of the PrimeSim Continuum from Synopsys can help you address systematic and scale complexity for your next IC design.
Nov 1, 2021
Yield Explorer and SiliconDash
Once a design goes to tape-out, the real challenges begin. Teams find themselves drowning in data from design-process-test during production ramp-up, and have to cope with data from numerous sources in different formats in the manufacturing test supply chain. In this episode of Chalk Talk, Amelia Dalton chats with Mark Laird of Synopsys in part three of our series on the Silicon LifeCycle Management (SLM) platform, discussing how Yield Explorer and SiliconDash give valuable insight to engineering and manufacturing teams.
Apr 12, 2021
In-Chip Sensing and PVT Monitoring
In-chip monitoring can significantly alter the lifecycle management landscape. By taking advantage of modern techniques, today’s more complex designs can be optimized even after they are deployed. In this episode of Chalk Talk, Amelia Dalton chats with Stephen Crosher of Synopsys about silicon lifecycle management and how to take full advantage of the optimization opportunities available for scalability, reliability, and much more.
Mar 19, 2021
Silicon Lifecycle Management (SLM)
Wouldn’t it be great if we could keep on analyzing our IC designs once they are in the field? After all, simulation and lab measurements can never tell the whole story of how devices will behave in real-world use. In this episode of Chalk Talk, Amelia Dalton chats with Randy Fish of Synopsys about gaining better insight into IC designs through the use of embedded monitors and sensors, and how we can enable a range of new optimizations throughout the lifecycle of our designs.
Feb 25, 2021


Synopsys Designer’s Digest

Elevate Your Chip Design and Development with
Award-winning, the industry’s first full stack, AI-driven electronic design automation suite, offers AI-driven workflow optimization & data analytics solutions along with breakthrough generative AI capabilities for next-level chip design.
Dec 8, 2023
Universal Verification Methodology Coverage for Bluespec RISC-V Cores
This whitepaper explains the basics of UVM functional coverage for RISC-V cores using the Google RISCV-DV open-source project, Synopsys verification solutions, and a RISC-V processor core from Bluespec.
Dec 7, 2023
An Automated Method for Adding Resiliency to Mission-Critical SoC Designs
Adding safety measures to SoC designs in the form of radiation-hardened elements or redundancy is essential in making mission-critical applications in the A&D, cloud, automotive, robotics, medical, and IoT industries more resilient against random hardware failures that occur. This paper discusses the automated process of implementing the safety mechanisms/measures (SM) in the design to make them more resilient and analyze their effectiveness from design inception to the final product.
Aug 23, 2023
Improving Design Robustness and Efficiency for Today’s Advanced Nodes
Learn how designers can take advantage of new ways to efficiently pinpoint voltage bottlenecks, drive voltage margin uniformity, and uncover opportunities to fine-tune operating voltages using PrimeShield design robustness solution.
Sep 28, 2021


Featured Videos from Synopsys

Tackling Challenges in 3DHI Microelectronics for Aerospace, Government, and Defense
Aerospace, Government, and Defense industry experts discuss the complexities of 3DHI for technological, manufacturing, & economic intricacies, as well as security, reliability, and safety challenges & solutions. Explore DARPA’s NGMM plan for the 3DHI R&D ecosystem.
Feb 14, 2024
Shape The Future Now with Synopsys ARC-V Processor IP
Synopsys ARC-V™ Processor IP delivers the optimal power-performance-efficiency and extensibility of ARC processors with broad software and tools support from Synopsys and the expanding RISC-V ecosystem. Built on the success of multiple generations of ARC processor IP covering a broad range of processor implementations, including functional safety (FS) versions, the ARC-V portfolio delivers what you need to optimize and differentiate your SoC.
Feb 1, 2024
Synopsys PCIe 6.0 End-to-End Hardware Linkup and Performance at PCI-SIG DevCon 2023
Join Gary Ruggles, Synopsys Product Manager for PCIe & CXL, at PCI-SIG DevCon 2023 and see Synopsys PCIe 6.0 Controller & PHY IP in an end-to-end host to device system, using Teledyne LeCroy's interposer & analyzer showing impact of payload size on throughput.
Jul 19, 2023
World's Most Interoperable PCIe 6.0 and Beyond at PCI-SIG DevCon 2023
See successful PCIe 6.0 interoperability demos in our booth & our partners’ booths at PCI-SIG DevCon 2023. Don’t miss our demo at 128 GT/s as we take a peek into the PCIe 7.0 tech and make sure to watch the world’s first PCIe 6.0 RX link training compliance tests.
Jul 19, 2023
Synopsys 224G Ethernet PHY IP Interop at TSMC Symposium 2023
At TSMC Symposium 2023 we showcased a successful 224G Ethernet PHY IP interop demonstration with backplane channels. Watch the various plots, ADC histogram and excellent eye diagrams results.
Jul 11, 2023
Synopsys 224G Ethernet PHY IP Wide-Open TX PAM-4 Eye
Watch this video of Synopsys 224G Ethernet PHY IP demonstrating wide-open TX PAM-4 eyes using Keysight’s oscilloscope & Samtec’s cables and connectors.
Jul 11, 2023
Synopsys End-to-End Solution for Glitch Power Analysis and Optimization
As glitch power becomes a growing component of total power, managing it requires a holistic solution for analysis and optimization from architecture to signoff. Watch this video and learn how to minimize glitch power in your designs.
Jun 15, 2023
Efficient Top-Level Interconnect Planning and Implementation with Synopsys IC Compiler II
This video shows how IC Compiler II and Fusion Compiler enable intelligent planning and implementation of complex interconnects through innovative Topological Interconnect Planning technology - accelerating schedules and achieving highest QoR.
Jun 6, 2023