Synopsys Blog
Keeping Hyperscale Data Centers Safe from Security Threats
January 27th
Cloud computing security starts at hyperscale data centers; learn how embedded IDE modules protect data across interfaces including PCIe 5.0 and CXL 2.0.
The post Keeping Hyperscale Data Centers Safe from Security Threats appeared first on From Silicon To Software.
How EDA Tools and IP Support Automotive Functional Safety Compliance
January 20th
Explore how EDA tools & proven IP accelerate the automotive design process and ensure compliance with Automotive Safety Integrity Levels & ISO requirements.
The post How EDA Tools and IP Support Automotive Functional Safety Compliance appeared first on From Silicon To Software.
5 Key Innovations that Are Making Everything Smarter
January 14th
Learn how electronic design automation (EDA) tools & silicon-proven IP enable today's most influential smart tech, including ADAS, 5G, IoT, and Cloud services.
The post 5 Key Innovations that Are Making Everything Smarter appeared first on From Silicon To Software.
Key Power Predictions for Chip Design in 2021
January 13th
We discuss chip design predictions for 2021, including Artificial Intelligence & Internet of Things' unique power management challenges between HPC & edge SoCs.
The post Key Power Predictions for Chip Design in 2021 appeared first on From Silicon To Software.
Synopsys Videos
AI SoC Chats: Protecting Data with Security IPUnderstand the threat profiles and security trends for AI SoC applications, including how laws and regulations are changing to protect the private information and data of users. Secure boot, secure debug, and secure communication for neural network engines is critical. Learn how DesignWare Security IP and Hardware Root of Trust can help designers create a secure enclave on the SoC and update software remotely. Click here for more information about Security IP |
AI SoC Chats: Scaling AI Systems with Die-to-Die InterfacesJoin Synopsys Interface IP expert Manmeet Walia to understand the trends around scaling AI SoCs and systems while minimizing latency and power by using die-to-die interfaces. Click here for more information about DesignWare IP for Amazing AI |
Product Update: Broad Portfolio of DesignWare IP for Mobile SoCsGet the latest update on DesignWare IP® for mobile SoCs, including MIPI C-PHY/D-PHY, USB 3.1, and UFS, which provide the necessary throughput, bandwidth, and efficiency for today’s advanced mobile SoCs. Click here for more information about DesignWare IP for 5G Mobile |