Silexica enables a software-defined world composed of intelligent products. We disrupt the developer’s journey from software to application-specific hardware systems, democratizing accelerated computing to help build a smart, connected and safe world.
Our mission is to provide software development tools reducing time-to-market of innovative software IP and intelligent products. Enabled by deep software analysis, heterogeneous hardware awareness and quick design space exploration, the SLX programming tools significantly accelerate the journey from software to application-specific hardware systems, empowering our customers to win markets.
Founded in 2014, Silexica is headquartered in Germany with offices in the US and Japan. It serves innovative companies in the automotive, robotics, wireless communications, aerospace, and financial industries and has received $28M in funding from international investors.
Latest Featured Content from Silexica
Featured Chalk Talk
SLX FPGA: Accelerate the Journey from C/C++ to FPGA
High-level synthesis (HLS) brings incredible power to FPGA design. But harnessing the full power of HLS with FPGAs can be difficult even for the most experienced engineering teams. In this episode of Chalk Talk, Amelia Dalton chats with Jordon Inkeles of Silexica about using the SLX FPGA tool to truly harness the power of HLS with FPGAs, getting better results faster - regardless of whether you are approaching from the hardware or software domain.
How to optimize an OpenCL Kernel for the data center using Silexica's SLX FPGA
FPGAs are being increasingly employed as co-processors in data centers. This application note explains how SLX FPGA accelerates a Fintech design example, leveraging Xilinx’s Vitis Platform’s bottom-up flow, Alveo U200 accelerator card, and Vitis quantitative finance library.
High-Level Synthesis: Can it outperform hand-coded HDL?
Do you still think that hand-coded HDL designs can outperform HLS, no matter what? In this white paper, we explore this perception by leveraging SLX FPGA and HLS to optimize an industrial image processing application, beating the performance of a hand-coded HDL with a speed-up of 64% in a fraction of time.
Adaptive Beamformer: An HLS Optimization Case Study with SLX FPGA
Learn more about how SLX FPGA provides a productivity and efficiency boost when using high-level synthesis (HLS) to implement FPGA applications in C/ C++, through automated analysis and optimization. In this beamforming example, SLX FPGA is able to achieve lower latency and cut development time from weeks down to minutes compared to hand-optimization for similar cost of resources.