Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence Blog – Latest Posts
BoardSurfers: Have You Heard About Computational Fluid Dynamics Yet?
Dear BoardSurfers, I want to unapologetically hijack the normal news and exciting feature information that you are accustomed to reading about in the world of PCB Design blogs to eagerly let you know...
HOT CHIPS: The Big Trends
Two big trends that are no surprise, they were big at HOT CHIPS last year and for other events like the Linley Processor Conferences, are every processor is an AI processor, and increasingly most...
The most awaited... CadenceLIVE India 2021: Best Presentation Awards
CadenceLIVE, Cadence’s annual user conference, has been a great platform for Cadence technology users, developers, and industry experts to connect, share ideas and best practices solve design...
Virtuoso Video Diary: Knowledge Booster Training Bytes – Part 9 Introduction to Virtuoso Module Generator and Virtuoso Floorplanner
What Is Module Generator? Virtuoso Module Generators, also known as Modgen, is designed to provide a way to generate multiple Pcell instances into a complex, highly matched, structured array. With...
HOT CHIPS: Two Big Beasts
Today, I'm covering two of the biggest chips presented at the recent HOT CHIPS. Ponte Vecchio, Intel's enormous graphics chip intended to be used in Argonne National Laboratories'...
Pegasus Flies into the GF Technology Summit
Today is the GF Technology Summit , what used to be called GTC in previous years. GF is, of course, GlobalFoundries. We also announced this morning that the Pegasus Verification System has been...
(P)SpiceITUp: Managing the Stress Levels of Design Components
I came across a question on a social media site about how to know when the absolute maximum ratings for a component have been exceeded? In other words, how do you identify components that are...
2021 CadenceLIVE Taiwan 使用者大會 - 10月7日隆重登場!!
Chalk Talks Featuring Cadence
Cloud Computing for Electronic Design (Are We There Yet?)
When your project is at crunch time, a shortage of server capacity can bring your schedule to a crawl. But, the rest of the year, having a bunch of extra servers sitting around idle can be extremely expensive. Cloud-based EDA lets you have exactly the compute resources you need, when you need them. In this episode of Chalk Talk, Amelia Dalton chats with Craig Johnson of Cadence Design Systems about Cadence’s cloud-based EDA solutions.
TensorFlow to RTL with High-Level Synthesis
Bridging the gap from the AI and data science world to the RTL and hardware design world can be challenging. High-level synthesis (HLS) can provide a mechanism to get from AI frameworks like TensorFlow into synthesizable RTL, enabling the development of high-performance inference architectures. In this episode of Chalk Talk, Amelia Dalton chats with Dave Apte of Cadence Design Systems about doing AI design with HLS.
Cadence Celsius Thermal Solver
Electrical-thermal co-simulation can dramatically improve the system design process, allowing thermal design adaptation to be done much earlier. The Cadence Celsius Thermal Solver is a complete electrical-thermal co-simulation solution for the full hierarchy of electronic systems from ICs to physical enclosures. In this episode of Chalk Talk, Amelia Dalton chats with CT Kao of Cadence Design Systems about how the Celsius Thermal Solver can help detect and mitigate thermal issues early in the design process.
Mom, I Have a Digital Twin? Now You Tell Me?
Today, one engineer’s “system” is another engineer’s “component.” The complexity of system-level design has skyrocketed with the new wave of intelligent systems. In this world, optimizing electronic system designs requires digital twins, shifting left, virtual platforms, and emulation to sort everything out. In this episode of Chalk Talk, Amelia Dalton chats with Frank Schirrmeister of Cadence Design Systems about system-level optimization.
Featured Content from Cadence
Accurate Full-System Thermal 3D Analysis
Designing electronics for the data center challenges designers to minimize and dissipate heat. Electrothermal co-simulation requires system components to be accurately modeled and analyzed. Learn about a true 3D solution that offers full system scalability with 3D analysis accuracy for the entire chip, package, board, and enclosure.
Digital Full-Flow Reinforcement Learning Technology Delivers Improved PPA
Venkat Thanvantri, Cadence VP of Machine Learning R&D, explains how to get better PPA more quickly than you can using a manual iterative approach with the innovative distributing computing technology and reinforcement learning engine of the new Cadence® Cerebrus™ Intelligent Chip Explorer.
Machine Learning-Driven Full-Flow Chip Design Automation
To enable continued semiconductor industry growth, the chip design process must become more efficient. With the availability of massive, cloud-enabled, distributed computing and advancements in machine learning technology, the next chip design automation revolution is now possible. Learn how engineering teams are able to scale and become more productive using the Cadence® Cerebrus™ Intelligent Chip Explorer, meeting the challenges of increasingly large and more complex SoC designs.
Adopt a Shift-left Methodology to Accelerate Your Product Development Process
Validate your most sophisticated SoC designs before silicon and stay on schedule. Balance your workload between simulation, emulation and prototyping for complete system validation. You need the right tool for the right job. Emulation meets prototyping -- Cadence Palladium and Protium Dynamic Duo for IP/SoC verification, hardware and software regressions, and early software development.