From immersive gaming to virtual collaboration, the XR chips powering these experiences are becoming more advanced—and more complex. As the industry races ahead, companies face a critical challenge: How to make sure these increasingly sophisticated chips not only work flawl...

ケイデンスは、AIベースの設計に最適化された最新インターフェース向けに、10種類の新しい検証IP（Verification IP：VIP）を発表しました。今回発表されたVIPは、Ultra Accelerator Link（UALink）、Ultra Ethernet（UEC）、...

The world's insatiable demand for compute will only continue to increase with the proliferation of AI. As compute demands grow, on-premises chip design becomes more complicated and costly, challenging existing infrastructure due to increased systems-on-chip (SoC) complex...

The semiconductor industry is entering a new era where transistor scaling alone can no longer fuel performance gain. With AI accelerators pushing beyond 2–5TB/s of die-to-die bandwidth, hyperscale systems demanding higher compute density, and mobile devices requiring extrem...

After finishing my webinar on synthesis to timing signoff flow, including the AI features discussed during the session, I received the following questions: "I missed the webinar. Do you have the recording?" “I work on implementation. I missed joining and learn abo...

Modern power delivery network (PDN) design poses numerous challenges. Traditionally, designers rely on target impedance analysis—a widely used and effective starting point for ensuring power integrity (PI). While its simplicity and historical success make it appealing, in t...

Need for Synchronization In a computer system, both the GPU as well as the monitor have a certain rate at which they render or update an image, respectively. The rate is nothing but the frequency at which the image is refreshed (updated in the image it shows/displays), usuall...

In this edition of Professionals in CFD , we have the privilege of speaking with Judy Susan Jose , a lead configuration management engineer for the Computational Fluid Dynamics (CFD) team. With a bachelor’s degree in computer engineering and a master’s in automotive embed...

The challenges for 3D IC design are greater than standard chip design - but they are not insurmountable. In this episode of Chalk Talk, Amelia Dalton chats with Vinay Patwardhan from Cadence Design Systems about the variety of challenges faced by 3D IC designers today and how Cadence’s integrated, high-capacity Integrity 3D IC Platform, with its 3D design planning and implementation cockpit, flow manager and co-design capabilities will not only help you with your next 3D IC design.

With increasing design sizes, complexity of advanced nodes, and faster time to market requirements - design teams are looking for scalability, simplicity, flexibility and agility. In today’s Chalk Talk, Amelia Dalton chats with Mahesh Turaga about the details of Cadence’s end to end cloud portfolio, how you can extend your on-prem environment with the push of a button with Cadence’s new hybrid cloud and Cadence’s Cloud solutions you can help you from design creation to systems design and more.

New applications and technology are driving demand for even more compute and functionality in the devices we use every day. System on chip (SoC) designs are quickly migrating to new process nodes, and rapidly growing in size and complexity. In this episode of Chalk Talk, Amelia Dalton chats with Rod Metcalfe about how machine learning combined with distributed computing offers new capabilities to automate and scale RTL to GDS chip implementation flows, enabling design teams to support more, and increasingly complex, SoC projects.

When your project is at crunch time, a shortage of server capacity can bring your schedule to a crawl. But, the rest of the year, having a bunch of extra servers sitting around idle can be extremely expensive. Cloud-based EDA lets you have exactly the compute resources you need, when you need them. In this episode of Chalk Talk, Amelia Dalton chats with Craig Johnson of Cadence Design Systems about Cadence’s cloud-based EDA solutions.

Learn how Switch, a leading designer, builder, and operator of U.S. exascale data centers, is taking their data center’s cooling capabilities even further. In the past 20 years, Switch has built some of the densest air-cooled data center environments. With AI taking off in the last couple of years, see how they were able to deploy many of the first NVIDIA H100 clusters inside using Cadence’s Reality Digital Twin Platform for pre-modeling, design, and validation.facilities.

Deploying data centers with AI high-density workloads and ensuring they are capable for anticipated power trends requires insight. Creating a digital twin using the Cadence Reality Digital Twin Platform helped plan the deployment of current workloads and future-proof the investment. Learn about the collaboration between NV5, NVIDIA, and Cadence to optimize data center efficiency, performance, and reliability. 

Larsen & Toubro built the world’s largest FIFA stadium in Qatar, the world’s tallest statue, and one of the world’s most sophisticated cricket stadiums. Their latest business venture? Designing data centers. Since IT equipment in data centers generates a lot of heat, it’s important to have an efficient and effective cooling system. Learn why, Larsen & Toubro use Cadence Reality DC Design Software for simulation and analysis of the cooling system.

In the AI era, as the signal-data rate increases, the signal integrity challenges in server designs also increase. Wiwynn provides hyperscale data centers with innovative cloud IT infrastructure, bringing the best total cost of ownership (TCO), energy, and energy-itemized IT solutions from the cloud to the edge.