The Fraunhofer IPMS-developed EMSA5-FS processor core for functional safety based on the open-source RISC-V instruction set architecture is supported by another important debug tool. With the integration into the toolsets of the leading manufacturer of microprocessor development tools Lauterbach, numerous debug functions are now available for the 32-bit RISC-V core.

The EMSA5-FS is the first fault-tolerant embedded RISC-V processor core according to functional safety and was … Read More → "Fraunhofer IPMS RISC-V processor core supported by de-bugging tool from Lauterbach"