MOUNTAIN VIEW, Calif., Nov. 4, 2010 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that San Francisco State University (SF State) is the latest university to receive the Charles Babbage Grant from Synopsys. Through the grant, the School of Engineering received licenses of Synopsys’ comprehensive electronic design automation (EDA) software and intellectual property, along with curriculum support and professor training. The grant also enabled the creation of a new Nanoelectronics and Computing Research Laboratory (NeCRL) by providing a new server and compute hardware … Read More → "San Francisco State University Receives Charles Babbage Grant from Synopsys"

Richardson, TX, October 25, 2010 – Alibre Inc. www.alibre.com, the award-winning developer of the world’s most affordable professional 3D design solutions, today announced a huge leap in 3D CAD design performance with the release of its latest version, Alibre Design 2011.  Alibre Design 2011 now makes 3D designing easier and more robust with major enhancements, including a complete top to bottom code re-write, native 64-bit version, powerful sheet metal conversion tools, and a myriad of time saving tools and customization features.  Available immediately for … Read More → "Alibre Launches Next Generation 3D Design Software — Alibre Design 2011"

SAN JOSE, Calif., and SINGAPORE, November 2, 2010 — Avago Technologies (Nasdaq: AVGO), a leading supplier of analog interface components for communications, industrial and consumer applications, today announced that it has demonstrated 28-Gbps Serializer/Deserializer (SerDes) performance in 40-nm CMOS process technology. The milestone equates to higher bandwidth Application-Specific Integrated Circuits (ASICs) that integrate the SerDes Intellectual Property (IP), increasing the speed of data communication for servers, routers and other networking, computing and storage applications.

“Avago has an established track record of setting new performance benchmarks for embedded SerDes IP, which is closely connected to our unmatched execution in … Read More → "Avago Technologies First to 28-Gbps Performance with 40-nm SerDes"

DALLAS, TX (November 3, 2010) – Delivering floating-point benefits to developers using fixed-point microcontrollers (MCUs), Texas Instruments Incorporated (TI) (NYSE: TXN) today announced that its free IQmath Library now supports both the 32-bit C2000 and Stellaris MCU platforms. TI’s IQmath Library is a proven, optimized collection of high-precision mathematical functions that allows programmers to seamlessly port floating-point algorithms into fixed-point code. Developers can use the software to achieve execution speeds considerably faster than equivalent code written in standard ANSI C language, which is important to computationally intensive applications such as motor control, digital power, security and human-machine interfaces. The … Read More → "TI’s free IQmath Library brings ease-of-use and precision benefits of floating point to developers leveraging C2000™ and Stellaris® microcontrollers"

SAN JOSE, CALIF. –– November 2, 2010 –– Imagination Technologies of Hertfordshire, United Kingdom, signed an agreement to extend the license of Forte Design Systems’ software for the continued design and support of its advanced, current-generation POWERVR graphics intellectual property (IP) cores.

Imagination uses Forte’s CellMath Optimizer to help enable its licensing partners to optimize silicon efficiency and performance in their target process technology.  As part of this latest agreement, Imagination will … Read More → "Imagination Technologies Licenses Forte’s CellMath IP and Tools"

SANTA CLARA, Calif., and MUNICH, Oct. 22, 2010 — Agilent Technologies Inc. (NYSE: A) and Nomor Research GmbH today announced the availability of a simple, cost-effective method for generating realistic LTE uplink inter-cell interference signals using Agilent’s MXG signal generators.

This is the most cost-effective approach for engineers who need to generate real-world cellular interference signal conditions to validate LTE system performance. The uplink signals are required for LTE field trials.</ … Read More → "Agilent Technologies and Nomor Research GmbH Generate LTE Uplink Inter-cell Interference Signals for LTE Field Trials, Performance Tests"

WILSONVILLE, Ore., November 1, 2010—Mentor Graphics Corporation (NASDAQ: MENT) today announced it has teamed up with ARM to provide an automated memory test and repair solution for ARM embedded memories and processor cores. The new capability provides full interoperability between Mentor’s industry-leading Tessent™ memory test and repair solution and ARM’s family of cores and embedded memory IP.

“The requirements for embedded memories are increasing as design … Read More → "Mentor Graphics and ARM Join Forces on Memory Test and Repair"

Ottawa, Canada and Santa Clara, Calif. – October 27, 2010

What:

Sidense is exhibiting at the International System-on-Chip (ISoC) conference, where they will discuss how Sidense’s 1T-OTP non-volatile memory IP, adopted by many top-tier semiconductor foundries and selected IDMs, can simplify chip designs and extend a product’s life cycle. 

… Read More → "Sidense Exhibiting at International System-on-Chip (ISoC) Conference"